Inventor · disambiguated record
Samuel J. Peters, Ii
Also filed as: PETERS II SAMUEL J · PETERS SAMUEL J
11 granted patents·89 citations·filing 1996–2018
88Inventor score
Top patents by PatentIndex Score
11 records- 0178US10476659B2SPDIF clock and data recovery with sample rate converterAVNERA CORP·Filed 2018·Granted Nov 12, 2019·2 cites·20 claims
- 0272US9621336B1SPDIF clock and data recovery with sample rate converterAVNERA CORP·Filed 2014·Granted Apr 11, 2017·2 cites·17 claims
- 0371US8848849B1SPDIF clock and data recovery with sample rate converterAVNERA CORP·Filed 2013·Granted Sep 30, 2014·4 cites·20 claims
- 0464US6041043ASONET path/ATM physical layer transmit/receive processorTEKTRONIX INC·Filed 1996·Granted Mar 21, 2000·32 cites·4 claims
- 0562US7100067B2Data transmission error reduction via automatic data sampling timing adjustmentHANSEN VICTOR·Filed 2003·Granted Aug 29, 2006·11 cites·25 claims
- 0661US7219174B2Inter-demux communication through a point to point interfaceTEKTRONIX INC·Filed 2003·Granted May 15, 2007·10 cites·21 claims
- 0760US6104374ASparse vector rasterizationTEKTRONIX INC·Filed 1998·Granted Aug 15, 2000·26 cites·29 claims
- 0856US10038548B2SPDIF clock and data recovery with sample rate converterAVNERA CORP·Filed 2017·Granted Jul 31, 2018·0 cites·16 claims
- 0955US9832012B2SPDIF clock and data recovery with sample rate converterAVNERA CORP·Filed 2017·Granted Nov 28, 2017·0 cites·10 claims
- 1051US7433303B2Preemptive network traffic control for regional and wide area networksNULL NETWORKS LLC·Filed 2002·Granted Oct 7, 2008·2 cites·24 claims
- 1137US7600144B2Data transmission error reduction via automatic data sampling timing adjustmentHANSEN VICTOR·Filed 2006·Granted Oct 6, 2009·0 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →