Inventor · disambiguated record
Lin-June Wu
Also filed as: WU LIN · WU LIN-JUNE
34 granted patents·3 pending applications·633 citations·filing 1993–2022
98Inventor score
Files withTAIWAN SEMICONDUCTOR MFG31NANJING UNIVERSITY OF TECHNOLOGY1TANG PENG CHO1TSENG UWAY1UNIV CHINA GEOSCIENCES BEIJING1
Top patents by PatentIndex Score
37 records- 0192US6667230B2Passivation and planarization process for flip chip packagesTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Dec 23, 2003·71 cites·26 claims
- 0286US6635576B1Method of fabricating borderless contact using graded-stair etch stop layersTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Oct 21, 2003·44 cites·29 claims
- 0386US5518959AMethod for selectively depositing silicon oxide spacer layersTAIWAN SEMICONDUCTOR MFG·Filed 1995·Granted May 21, 1996·82 cites·10 claims
- 0485US8502335B2CMOS image sensor big via bonding pad application for AlCu ProcessTSENG UWAY·Filed 2009·Granted Aug 6, 2013·15 cites·20 claims
- 0585US8344471B2CMOS image sensor big via bonding pad application for AICu processTAIWAN SEMICONDUCTOR MFG·Filed 2009·Granted Jan 1, 2013·11 cites·20 claims
- 0683US6468904B1RPO process for selective CoSix formationTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Oct 22, 2002·41 cites·23 claims
- 0777US5747381ATechnique for the removal of residual spin-on-glass (SOG) after full SOG etchbackTAIWAN SEMICONDUCTOR MFG·Filed 1996·Granted May 5, 1998·50 cites·21 claims
- 0875US8680635B2CMOS image sensor big via bonding pad application for AICu processTAIWAN SEMICONDUCTOR MFG·Filed 2012·Granted Mar 25, 2014·3 cites·20 claims
- 0973US6465308B1Tunable threshold voltage of a thick field oxide ESD protection device with a N-field implantTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Oct 15, 2002·17 cites·10 claims
- 1071US6611028B2Dynamic substrate-coupled electrostatic discharging protection circuitTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Aug 26, 2003·14 cites·13 claims
- 1171US6284557B1Optical sensor by using tunneling diodeTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Sep 4, 2001·34 cites·37 claims
- 1268US6531382B1Use of a capping layer to reduce particle evolution during sputter pre-clean proceduresTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Mar 11, 2003·16 cites·22 claims
- 1368US6362491B1Method of overlay measurement in both X and Y directions for photo stitch processTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Mar 26, 2002·26 cites·20 claims
- 1466US5393692ARecessed side-wall poly plugged local oxidationTAIWAN SEMICONDUCTOR MFG·Filed 1993·Granted Feb 28, 1995·40 cites·22 claims
- 1565US5953601AESD implantation scheme for 0.35 μm 3.3V 70A gate oxide processTAIWAN SEMICONDUCTOR MFG·Filed 1998·Granted Sep 14, 1999·25 cites·9 claims
- 1664US8691822B2Dihydropteridinone derivatives, preparation process and pharmaceutical use thereofTANG PENG CHO·Filed 2010·Granted Apr 8, 2014·1 cites·17 claims
- 1764US7220650B2Sidewall spacer for semiconductor device and fabrication method thereofTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted May 22, 2007·10 cites·8 claims
- 1863US6479872B1Dynamic substrate-coupled electrostatic discharging protection circuitTAIWAN SEMICONDUCTOR MFG·Filed 1998·Granted Nov 12, 2002·19 cites·9 claims
- 1961US5942800AStress buffered bond pad and method of makingTAIWAN SEMICONDUCTOR MFG·Filed 1998·Granted Aug 24, 1999·25 cites·20 claims
- 2056US12183535B2Dielectric coated plasmonic photoemitterUNIV MICHIGAN STATE·Filed 2022·Granted Dec 31, 2024·0 cites·20 claims
- 2156US6717220B2Tunable threshold voltage of a thick field oxide ESD protection device with a N-field implantTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Apr 6, 2004·6 cites·15 claims
- 2256US5801090AMethod of protecting an alignment mark in a semiconductor manufacturing process with CMPTAIWAN SEMICONDUCTOR MFG·Filed 1997·Granted Sep 1, 1998·22 cites·20 claims
- 2355US12241179B2High-whiteness polyimide microfiber and preparation method thereof and useUNIV CHINA GEOSCIENCES BEIJING·Filed 2021·Granted Mar 4, 2025·0 cites·6 claims
- 2449US5981347AMultiple thermal annealing method for a metal oxide semiconductor field effect transistor with enhanced hot carrier effect (HCE) resistanceTAIWAN SEMICONDUCTOR MFG·Filed 1997·Granted Nov 9, 1999·16 cites·5 claims
- 2548US6251724B1Method to increase the clear ration of capacitor silicon nitride to improve the threshold voltage uniformityTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Jun 26, 2001·15 cites·10 claims
- 2646US7067896B2Microelectronic fabrication having edge passivated bond pad integrated with option selection device access apertureTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Jun 27, 2006·3 cites·20 claims
- 2742US2005277262A1Method for manufacturing isolation structures in a semiconductor deviceTAIWAN SEMICONDUCTOR MFG·Filed 2004·Application pending·0 cites
- 2840US6693317B2Optical sensor by using tunneling diodeTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Feb 17, 2004·0 cites·4 claims
- 2940US6329717B1Integrated circuit having selectivity deposited silicon oxide spacer layer formed thereinTAIWAN SEMICONDUCTOR MFG·Filed 1996·Granted Dec 11, 2001·8 cites·10 claims
- 3040US6194275B1Method to form a mask ROM device with coding after source and drain implantationTAIWAN SEMICONDUCTOR MFG·Filed 2000·Granted Feb 27, 2001·1 cites·20 claims
- 3139US6582981B2Method of using a tunneling diode in optical sensing devicesTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Jun 24, 2003·0 cites·4 claims
- 3239US2005118802A1Method for implementing poly pre-doping in deep sub-micron processFiled 2004·Application pending·0 cites
- 3337US6258706B1Method for fabricating a stress buffered bond padTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Jul 10, 2001·8 cites·14 claims
- 3436US6077746AUsing p-type halo implant as ROM cell isolation in flat-cell mask ROM processTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Jun 20, 2000·6 cites·8 claims
- 3533US6297102B1Method of forming a surface implant region on a ROM cell using a PLDD implantTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Oct 2, 2001·3 cites·8 claims
- 3633US2008306248A1Conjugate of Biomacromolecule with Bioreductive and Preparative Method ThereofNANJING UNIVERSITY OF TECHNOLOGY·Filed 2006·Application pending·0 cites
- 3725US6180964B1Low leakage wire bond pad structure for integrated circuitsTAIWAN SEMICONDUCTOR MFG·Filed 1998·Granted Jan 30, 2001·1 cites·10 claims
Join the waitlist — get patent alerts
Get an alert when Lin-June Wu files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →