Inventor · disambiguated record
Christopher F. Lane
Also filed as: LANE CHRISTOPHER · LANE CHRISTOPHER F
81 granted patents·4 pending applications·2,470 citations·filing 1995–2017
99Inventor score
Top patents by PatentIndex Score
85 records- 0199US6215326B1Programmable logic device architecture with super-regions having logic regions and a memory regionALTERA CORP·Filed 1999·Granted Apr 10, 2001·331 cites·20 claims
- 0298US9331062B1Integrated circuits with backside power deliveryALTERA CORP·Filed 2013·Granted May 3, 2016·57 cites·16 claims
- 0397US7295036B1Method and system for reducing static leakage current in programmable logic devicesALTERA CORP·Filed 2005·Granted Nov 13, 2007·45 cites·23 claims
- 0497US6157210AProgrammable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuitsALTERA CORP·Filed 1998·Granted Dec 5, 2000·157 cites·119 claims
- 0597US5909126AProgrammable logic array integrated circuit devices with interleaved logic array blocksALTERA CORP·Filed 1996·Granted Jun 1, 1999·133 cites·43 claims
- 0696US6107824ACircuitry and methods for internal interconnection of programmable logic devicesALTERA CORP·Filed 1998·Granted Aug 22, 2000·103 cites·158 claims
- 0796US6069487AProgrammable logic device circuitry for improving multiplier speed and/or efficiencyALTERA CORP·Filed 1998·Granted May 30, 2000·118 cites·26 claims
- 0895US6052327ADual-port programmable logic device variable depth and width memory arrayALTERA CORP·Filed 1998·Granted Apr 18, 2000·110 cites·25 claims
- 0995US5850152AProgrammable logic array integrated circuit devicesALTERA CORP·Filed 1997·Granted Dec 15, 1998·69 cites·10 claims
- 1095US5592102AMeans and apparatus to minimize the effects of silicon processing defects in programmable logic devicesALTERA CORP·Filed 1995·Granted Jan 7, 1997·96 cites·16 claims
- 1194US6897678B2Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuitsALTERA CORP·Filed 2002·Granted May 24, 2005·48 cites·14 claims
- 1293US7355440B1Method of reducing leakage current using sleep transistors in programmable logic deviceALTERA CORP·Filed 2005·Granted Apr 8, 2008·23 cites·19 claims
- 1393US6417694B1Programmable logic device with hierarchical interconnection resourcesALTERA CORP·Filed 2001·Granted Jul 9, 2002·40 cites·9 claims
- 1493US5977793AProgrammable logic device with hierarchical interconnection resourcesALTERA CORP·Filed 1997·Granted Nov 2, 1999·87 cites·43 claims
- 1592US6670825B1Efficient arrangement of interconnection resources on programmable logic devicesALTERA CORP·Filed 2002·Granted Dec 30, 2003·39 cites·24 claims
- 1692US6462577B1Configurable memory structures in a programmable logic deviceALTERA CORP·Filed 2001·Granted Oct 8, 2002·75 cites·30 claims
- 1792US6191998B1Programmable logic device memory array circuit having combinable single-port memory arraysALTERA CORP·Filed 1999·Granted Feb 20, 2001·104 cites·12 claims
- 1892US5942914APLD with split multiplexed inputs from global conductorsALTERA CORP·Filed 1997·Granted Aug 24, 1999·100 cites·26 claims
- 1992US5850151AProgrammable logic array intergrated circuit devicesALTERA CORP·Filed 1997·Granted Dec 15, 1998·47 cites·16 claims
- 2091US7218133B2Versatile logic element and logic array blockALTERA CORP·Filed 2005·Granted May 15, 2007·16 cites·6 claims
- 2190US7304527B1Fuse sensing circuitALTERA CORP·Filed 2005·Granted Dec 4, 2007·20 cites·11 claims
- 2290US6965249B2Programmable logic device with redundant circuitryALTERA CORP·Filed 2002·Granted Nov 15, 2005·39 cites·109 claims
- 2390US6842039B1Configuration shift registerALTERA CORP·Filed 2002·Granted Jan 11, 2005·37 cites·26 claims
- 2489US9503057B1Clock grid for integrated circuitALTERA CORP·Filed 2013·Granted Nov 22, 2016·9 cites·28 claims
- 2589US7400167B2Apparatus and methods for optimizing the performance of programmable logic devicesALTERA CORP·Filed 2005·Granted Jul 15, 2008·17 cites·24 claims
- 2688US7518399B1Method of reducing leakage current using sleep transistors in programmable logic deviceALTERA CORP·Filed 2008·Granted Apr 14, 2009·13 cites·20 claims
- 2788US7405589B2Apparatus and methods for power management in integrated circuitsALTERA CORP·Filed 2005·Granted Jul 29, 2008·13 cites·23 claims
- 2888US6937064B1Versatile logic element and logic array blockALTERA CORP·Filed 2002·Granted Aug 30, 2005·26 cites·42 claims
- 2988US6075380AProgrammable logic device with expandable-width memory regionsALTERA CORP·Filed 1997·Granted Jun 13, 2000·47 cites·26 claims
- 3086US6481000B1Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuitsALTERA CORP·Filed 2000·Granted Nov 12, 2002·27 cites·55 claims
- 3186US6300794B1Programmable logic device with hierarchical interconnection resourcesALTERA CORP·Filed 2000·Granted Oct 9, 2001·23 cites·20 claims
- 3285US8103975B2Apparatus and methods for optimizing the performance of programmable logic devices using multiple supply voltageLEWIS DAVID·Filed 2008·Granted Jan 24, 2012·10 cites·9 claims
- 3385US6577160B2Programmable logic device with hierarchical interconnection resourcesALTERA CORP·Filed 2002·Granted Jun 10, 2003·21 cites·12 claims
- 3483US6507216B1Efficient arrangement of interconnection resources on programmable logic devicesALTERA CORP·Filed 2001·Granted Jan 14, 2003·22 cites·20 claims
- 3583US6255846B1Programmable logic devices with enhanced multiplexing capabilitiesALTERA CORP·Filed 2000·Granted Jul 3, 2001·20 cites·58 claims
- 3682US7589552B1Integrated circuit with redundancyALTERA CORP·Filed 2007·Granted Sep 15, 2009·11 cites·21 claims
- 3782US6630842B1Routing architecture for a programmable logic deviceALTERA CORP·Filed 2002·Granted Oct 7, 2003·25 cites·75 claims
- 3881US6084427AProgrammable logic devices with enhanced multiplexing capabilitiesALTERA CORP·Filed 1998·Granted Jul 4, 2000·29 cites·26 claims
- 3978US9094014B2PLD architecture for flexible placement of IP function blocksALTERA CORP·Filed 2014·Granted Jul 28, 2015·2 cites·20 claims
- 4078US8732646B2PLD architecture for flexible placement of IP function blocksALTERA CORP·Filed 2013·Granted May 20, 2014·2 cites·20 claims
- 4178US6323677B1Programmable logic device circuitry for improving multiplier speed and/or efficiencyALTERA CORP·Filed 2000·Granted Nov 27, 2001·17 cites·20 claims
- 4277US7432734B2Versatile logic element and logic array blockALTERA CORP·Filed 2007·Granted Oct 7, 2008·6 cites·14 claims
- 4376US8407649B2PLD architecture for flexible placement of IP function blocksLEE ANDY L·Filed 2012·Granted Mar 26, 2013·2 cites·20 claims
- 4476US6392438B1Programmable logic array integrated circuit devicesALTERA CORP·Filed 2000·Granted May 21, 2002·10 cites·20 claims
- 4576US5963049AProgrammable logic array integrated circuit architecturesALTERA CORP·Filed 1997·Granted Oct 5, 1999·24 cites·14 claims
- 4675US6356110B1Multifunction memory array in a programmable logic deviceALTERA CORP SAN JOSE CA·Filed 2000·Granted Mar 12, 2002·21 cites·15 claims
- 4774US9843332B1Clock grid for integrated circuitALTERA CORP·Filed 2017·Granted Dec 12, 2017·1 cites·20 claims
- 4872US6970014B1Routing architecture for a programmable logic deviceALTERA CORP·Filed 2003·Granted Nov 29, 2005·15 cites·25 claims
- 4970US6384625B1Programmable logic devices with enhanced multiplexing capabilitiesALTERA CORP·Filed 2001·Granted May 7, 2002·10 cites·27 claims
- 5069US6288970B1Programmable logic device memory array circuit having combinable single-port memory arraysALTERA CORP·Filed 1998·Granted Sep 11, 2001·28 cites·59 claims
Showing the top 50 of 85 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →