Inventor · disambiguated record
Teh-Kuin Lee
Also filed as: LEE TEH-KUIN
8 granted patents·361 citations·filing 1994–1997
89Inventor score
Files withLSI LOGIC CORP8
Top patents by PatentIndex Score
8 records- 0192US5698873AHigh density gate array base cell architectureLSI LOGIC CORP·Filed 1996·Granted Dec 16, 1997·129 cites·33 claims
- 0291US5917207AProgrammable polysilicon gate array base cell architectureLSI LOGIC CORP·Filed 1997·Granted Jun 29, 1999·135 cites·20 claims
- 0372US5486786AProcess monitor for CMOS integrated circuitsLSI LOGIC CORP·Filed 1994·Granted Jan 23, 1996·45 cites·29 claims
- 0456US5686855AProcess monitor for CMOS integrated circuitsLSI LOGIC CORP·Filed 1995·Granted Nov 11, 1997·19 cites·6 claims
- 0544US5691218AMethod of fabricating a programmable polysilicon gate array base cell structureLSI LOGIC CORP·Filed 1996·Granted Nov 25, 1997·11 cites·8 claims
- 0644US5631596AProcess monitor for CMOS integrated circuitsLSI LOGIC CORP·Filed 1995·Granted May 20, 1997·13 cites·22 claims
- 0743US5812003ATTL delay matching circuitLSI LOGIC CORP·Filed 1994·Granted Sep 22, 1998·7 cites·12 claims
- 0831US5650740ATTL delay matching circuitLSI LOGIC CORP·Filed 1996·Granted Jul 22, 1997·2 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →