Inventor · disambiguated record
Patrick Chuang
Also filed as: CHUANG PATRICK · CHUANG PATRICK T
41 granted patents·2 pending applications·930 citations·filing 1981–2020
98Inventor score
Files withGSI TECHNOLOGY INC18SONY CORP11ADVANCED MICRO DEVICES INC10SONY ELECTRONICS INC2HAIG ROBERT1
Top patents by PatentIndex Score
43 records- 0199US10854284B1Computational memory cell and processing array device with ratioless write portGSI TECHNOLOGY INC·Filed 2020·Granted Dec 1, 2020·16 cites·18 claims
- 0298US10943648B1Ultra low VDD memory cell with ratioless write portGSI TECHNOLOGY INC·Filed 2020·Granted Mar 9, 2021·9 cites·8 claims
- 0398US9853633B1Systems and methods involving lock-loop circuits, clock signal alignment, phase-averaging feedback clock circuitryGSI TECHNOLOGY INC·Filed 2016·Granted Dec 26, 2017·24 cites·31 claims
- 0497US10425070B2Systems and methods involving lock-loop circuits, clock signal alignment, phase-averaging feedback clock circuitryGSI TECHNOLOGY INC·Filed 2017·Granted Sep 24, 2019·23 cites·10 claims
- 0597US9935635B2Systems and methods involving pseudo complementary output buffer circuitry/schemes, power noise reduction and/or other featuresGSI TECHNOLOGY INC·Filed 2016·Granted Apr 3, 2018·23 cites·16 claims
- 0697US9679631B2Systems and methods involving multi-bank, dual- or multi-pipe SRAMsGSI TECHNOLOGY INC·Filed 2015·Granted Jun 13, 2017·26 cites·37 claims
- 0796US10891076B1Results processing circuits and methods associated with computational memory cellsGSI TECHNOLOGY INC·Filed 2018·Granted Jan 12, 2021·14 cites·44 claims
- 0896US10770133B1Read and write data processing circuits and methods associated with computational memory cells that provides write inhibits and read bit line pre-charge inhibitsGSI TECHNOLOGY INC·Filed 2018·Granted Sep 8, 2020·22 cites·24 claims
- 0996US10659058B1Systems and methods involving lock loop circuits, distributed duty cycle correction loop circuitryGSI TECHNOLOGY INC·Filed 2016·Granted May 19, 2020·24 cites·30 claims
- 1096US9613670B2Memory systems and methods involving high speed local address circuitryGSI TECHNOLOGY INC·Filed 2016·Granted Apr 4, 2017·23 cites·27 claims
- 1196US9494647B1Systems and methods involving data inversion devices, circuitry, schemes and/or related aspectsGSI TECHNOLOGY INC·Filed 2014·Granted Nov 15, 2016·28 cites·23 claims
- 1296US9318174B1Memory systems and methods involving high speed local address circuitryGSI TECHNOLOGY INC·Filed 2014·Granted Apr 19, 2016·23 cites·24 claims
- 1396US9196324B2Systems and methods involving multi-bank, dual- or multi-pipe SRAMsGSI TECHNOLOGY INC·Filed 2014·Granted Nov 24, 2015·24 cites·45 claims
- 1495US4928260AContent addressable memory array with priority encoderADVANCED MICRO DEVICES INC·Filed 1988·Granted May 22, 1990·128 cites·6 claims
- 1593US10860320B1Orthogonal data transposition system and method during data transfers to/from a processing arrayGSI TECHNOLOGY INC·Filed 2018·Granted Dec 8, 2020·12 cites·22 claims
- 1693US7595657B2Dynamic dual control on-die terminationSONY CORP·Filed 2008·Granted Sep 29, 2009·25 cites·26 claims
- 1793US7313040B2Dynamic sense amplifier for SRAMSONY CORP·Filed 2006·Granted Dec 25, 2007·34 cites·29 claims
- 1892US7646215B2Efficient method for implementing programmable impedance output drivers and programmable input on die termination on a bi-directional data busSONY CORP·Filed 2008·Granted Jan 12, 2010·29 cites·19 claims
- 1990US7389457B2Shift registers free of timing race boundary scan registers with two-phase clock controlSONY CORP·Filed 2006·Granted Jun 17, 2008·26 cites·28 claims
- 2089US4611309ANon-volatile dynamic RAM cellADVANCED MICRO DEVICES INC·Filed 1984·Granted Sep 9, 1986·53 cites·40 claims
- 2188US4634894ALow power CMOS reference generator with low impedance driverADVANCED MICRO DEVICES INC·Filed 1985·Granted Jan 6, 1987·39 cites·36 claims
- 2284US8542050B2Minimized line skew generatorKIM JAE-HYEONG·Filed 2006·Granted Sep 24, 2013·23 cites·39 claims
- 2384US4421996ASense amplification scheme for random access memoryADVANCED MICRO DEVICES INC·Filed 1981·Granted Dec 20, 1983·38 cites·11 claims
- 2483US8982649B2Systems and methods involving multi-bank, dual- or multi-pipe SRAMsHAIG ROBERT·Filed 2011·Granted Mar 17, 2015·9 cites·25 claims
- 2581US10720205B2Systems and methods involving multi-bank, dual-pipe memory circuitryGSI TECHNOLOGY INC·Filed 2015·Granted Jul 21, 2020·6 cites·30 claims
- 2681US4438346ARegulated substrate bias generator for random access memoryADVANCED MICRO DEVICES INC·Filed 1981·Granted Mar 20, 1984·34 cites·17 claims
- 2779US11409528B2Orthogonal data transposition system and method during data transfers to/from a processing arrayGSI TECHNOLOGY INC·Filed 2020·Granted Aug 9, 2022·1 cites·36 claims
- 2866US11194519B2Results processing circuits and methods associated with computational memory cellsGSI TECHNOLOGY INC·Filed 2019·Granted Dec 7, 2021·0 cites·36 claims
- 2966US4890260AContent addressable memory array with maskable and resettable bitsADVANCED MICRO DEVICES INC·Filed 1988·Granted Dec 26, 1989·35 cites·5 claims
- 3065US4615020ANonvolatile dynamic ram circuitADVANCED MICRO DEVICES INC·Filed 1983·Granted Sep 30, 1986·15 cites·17 claims
- 3164US4598387ACapacitive memory signal doubler cellADVANCED MICRO DEVICES INC·Filed 1983·Granted Jul 1, 1986·15 cites·10 claims
- 3263US5121013ANoise reducing output buffer circuit with feedback pathADVANCED MICRO DEVICES INC·Filed 1990·Granted Jun 9, 1992·21 cites·12 claims
- 3362US4888731AContent addressable memory array system with multiplexed status and command informationADVANCED MICRO DEVICES INC·Filed 1988·Granted Dec 19, 1989·30 cites·10 claims
- 3460US2021216246A1Results processing circuits and methods associated with computational memory cellsGSI TECHNOLOGY INC·Filed 2020·Application pending·0 cites
- 3552US5528541ACharge shared precharge scheme to reduce compare output delaysSONY CORP·Filed 1994·Granted Jun 18, 1996·22 cites·22 claims
- 3649US5515024AHigh performance dynamic compare circuitSONY CORP·Filed 1994·Granted May 7, 1996·19 cites·14 claims
- 3745US5459416ASense amplifier common mode dip filter circuit to avoid false missesSONY ELECTRONICS INC·Filed 1994·Granted Oct 17, 1995·10 cites·19 claims
- 3839US6798687B2System and method for effectively implementing a high speed DRAM deviceSONY CORP·Filed 2002·Granted Sep 28, 2004·2 cites·41 claims
- 3937US5537355AScheme to test/repair multiple large RAM blocksSONY CORP·Filed 1994·Granted Jul 16, 1996·5 cites·9 claims
- 4036US6078531AWord line voltage supply circuitSONY CORP·Filed 1999·Granted Jun 20, 2000·8 cites·7 claims
- 4136US5617563ADuty cycle independent tunable clockSONY CORP·Filed 1994·Granted Apr 1, 1997·7 cites·20 claims
- 4236US5577228ADigital circuit for performing multicycle addressing in a digital memorySONY CORP·Filed 1994·Granted Nov 19, 1996·5 cites·4 claims
- 4334US2007080697A1Semiconductor device tester pin contact resistance measurementSONY ELECTRONICS INC·Filed 2006·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →