Inventor · disambiguated record
Dharin N. Shah
Also filed as: SHAH DHARIN · SHAH DHARIN N · SHAH DHARIN NAYESHBHAI
18 granted patents·216 citations·filing 2005–2018
94Inventor score
Files withTEXAS INSTRUMENTS INC12MEDIATEK SINGAPORE PTE LTD2BRANCH CHARLES M1SAVITHRI NAGARAJ N1SHAH DHARIN N1
Top patents by PatentIndex Score
18 records- 0196US7596732B2Digital storage element architecture comprising dual scan clocks and gated scan outputTEXAS INSTRUMENTS INC·Filed 2005·Granted Sep 29, 2009·42 cites·8 claims
- 0294US7895551B2Generation of standard cell library components with increased signal routing resourcesTEXAS INSTRUMENTS INC·Filed 2008·Granted Feb 22, 2011·62 cites·12 claims
- 0390US7652513B2Slave latch controlled retention flop with lower leakage and higher performanceTEXAS INSTRUMENTS INC·Filed 2007·Granted Jan 26, 2010·29 cites·20 claims
- 0488US7487417B2Digital storage element with enable signal gatingTEXAS INSTRUMENTS INC·Filed 2005·Granted Feb 3, 2009·16 cites·10 claims
- 0585US7564077B2Performance and area scalable cell architecture technologyTEXAS INSTRUMENTS INC·Filed 2007·Granted Jul 21, 2009·16 cites·11 claims
- 0682US7345518B2Digital storage element with dual behaviorTEXAS INSTRUMENTS INC·Filed 2005·Granted Mar 18, 2008·14 cites·15 claims
- 0780US7274234B2Digital storage element architecture comprising integrated multiplexer and reset functionalityTEXAS INSTRUMENTS INC·Filed 2005·Granted Sep 25, 2007·10 cites·14 claims
- 0874US9218892B2Error prediction in logic and memory devicesTEXAS INSTRUMENTS INC·Filed 2014·Granted Dec 22, 2015·3 cites·9 claims
- 0971US8762804B2Error prediction in logic and memory devicesSHAH DHARIN N·Filed 2012·Granted Jun 24, 2014·4 cites·9 claims
- 1070US9576621B2Read-current and word line delay path tracking for sense amplifier enable timingTEXAS INSTRUMENTS INC·Filed 2013·Granted Feb 21, 2017·4 cites·17 claims
- 1168US7274233B2Digital storage element architecture comprising integrated 4-to-1 multiplexer functionalityTEXAS INSTRUMENTS INC·Filed 2005·Granted Sep 25, 2007·4 cites·12 claims
- 1263US7441218B2Contact resistance and capacitance for semiconductor devicesTEXAS INSTRUMENTS INC·Filed 2006·Granted Oct 21, 2008·2 cites·11 claims
- 1356US8127263B2Improving routability of integrated circuit design without impacting the design areaTORVI PAVAN VITHAL·Filed 2009·Granted Feb 28, 2012·3 cites·20 claims
- 1453US8112737B2Contact resistance and capacitance for semiconductor devicesSAVITHRI NAGARAJ N·Filed 2008·Granted Feb 7, 2012·1 cites·11 claims
- 1550US7793178B2Cell supporting scan-based tests and with reduced time delay in functional modeTEXAS INSTRUMENTS INC·Filed 2006·Granted Sep 7, 2010·4 cites·4 claims
- 1644US8692592B2Digital storage element architecture comprising integrated 2-to-1 multiplexer functionalityBRANCH CHARLES M·Filed 2005·Granted Apr 8, 2014·2 cites·6 claims
- 1739US10580479B2Self-time scheme for optimizing performance and power in dual rail power supplies memoriesMEDIATEK SINGAPORE PTE LTD·Filed 2018·Granted Mar 3, 2020·0 cites·20 claims
- 1839US10319432B2Circuits for pulse-width control in memory devices and related methodsMEDIATEK SINGAPORE PTE LTD·Filed 2017·Granted Jun 11, 2019·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →