Inventor · disambiguated record
Donald George Mikan, Jr.
Also filed as: MIKAN DONALD · MIKAN DONALD G · MIKAN JR DONALD · MIKAN JR DONALD G
30 granted patents·1 pending application·556 citations·filing 1994–2025
97Inventor score
Files withIBM21TAIWAN SEMICONDUCTOR MFG CO LTD5TEXAS INSTRUMENTS INC2MIKAN DONALD1MIKAN JR DONALD G1
Top patents by PatentIndex Score
31 records- 0196US6157216ACircuit driver on SOI for merged logic and memory circuitsIBM·Filed 1999·Granted Dec 5, 2000·140 cites·15 claims
- 0290US7864600B2Memory cell employing reduced voltageTEXAS INSTRUMENTS INC·Filed 2008·Granted Jan 4, 2011·18 cites·14 claims
- 0390US7660150B2Memory cell having improved write stabilityTEXAS INSTRUMENTS INC·Filed 2007·Granted Feb 9, 2010·24 cites·20 claims
- 0489US8248867B2Memory cell employing reduced voltageMIKAN JR DONALD GEORGE·Filed 2010·Granted Aug 21, 2012·14 cites·7 claims
- 0589US2025348394A1Scan synchronous-write-through testing architectures for a memory deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0688US11734142B2Scan synchronous-write-through testing architectures for a memory deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Aug 22, 2023·1 cites·20 claims
- 0787US8437214B2Memory cell employing reduced voltageMIKAN DONALD·Filed 2012·Granted May 7, 2013·11 cites·2 claims
- 0881US11256588B2Scan synchronous-write-through testing architectures for a memory deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Feb 22, 2022·1 cites·20 claims
- 0981US6087855AHigh performance dynamic multiplexers without clocked NFETIBM·Filed 1998·Granted Jul 11, 2000·38 cites·26 claims
- 1079US5896046ALatch structure for ripple domino logicIBM·Filed 1997·Granted Apr 20, 1999·32 cites·7 claims
- 1179US5892372ACreating inversions in ripple domino logicIBM·Filed 1997·Granted Apr 6, 1999·35 cites·17 claims
- 1277US12436858B2Scan synchronous-write-through testing architectures for a memory deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Oct 7, 2025·0 cites·20 claims
- 1372US6445236B1Master-slave flip-flop circuit with embedded hold function and method for holding data in a master-slave flip-flop circuitIBM·Filed 2001·Granted Sep 3, 2002·17 cites·20 claims
- 1470US6240536B1Scanable latch circuit and method for providing a scan output from a latch circuitIBM·Filed 1998·Granted May 29, 2001·21 cites·25 claims
- 1569US5901079ASkewed memory cell apparatus and methodIBM·Filed 1997·Granted May 4, 1999·35 cites·21 claims
- 1665US6111444AEdge triggered latchIBM·Filed 1998·Granted Aug 29, 2000·20 cites·8 claims
- 1765US5493520ATwo state leading zero/one anticipator (LZA)IBM·Filed 1994·Granted Feb 20, 1996·42 cites·16 claims
- 1858US10705934B2Scan synchronous-write-through testing architectures for a memory deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Jul 7, 2020·1 cites·19 claims
- 1954US5818264ADynamic circuit having improved noise immunity and method thereforIBM·Filed 1996·Granted Oct 6, 1998·13 cites·7 claims
- 2052US8502564B2Adjustable Schmitt triggerMIKAN JR DONALD G·Filed 2011·Granted Aug 6, 2013·1 cites·20 claims
- 2152US6532544B1High gain local clock buffer for a mesh clock distribution utilizing a gain enhanced split driver clock bufferIBM·Filed 1999·Granted Mar 11, 2003·24 cites·11 claims
- 2252US5757205APower-saving dynamic circuitIBM·Filed 1996·Granted May 26, 1998·10 cites·10 claims
- 2345US5764549AFast floating point result alignment apparatusIBM·Filed 1996·Granted Jun 9, 1998·18 cites·6 claims
- 2442US6121796APower-saving dynamic circuitIBM·Filed 1998·Granted Sep 19, 2000·5 cites·4 claims
- 2540US6737888B1Method for skipping a latch in timing-sensitive dynamic circuits of a multi-clocked system with unspecific underlap requirementIBM·Filed 1999·Granted May 18, 2004·5 cites·8 claims
- 2639US6667637B1Dynamic logic circuit with beta controllable noise marginIBM·Filed 1997·Granted Dec 23, 2003·5 cites·24 claims
- 2739US5636156AAdder with improved carry lookahead structureIBM·Filed 1996·Granted Jun 3, 1997·11 cites·7 claims
- 2835US5668525AComparator circuit using two bit to four bit encoderIBM·Filed 1996·Granted Sep 16, 1997·8 cites·27 claims
- 2932US5754885AApparatus and method for selecting entries from an arrayIBM·Filed 1996·Granted May 19, 1998·5 cites·17 claims
- 3030US6094062ACoupled noise reduction circuitryIBM·Filed 1998·Granted Jul 25, 2000·0 cites·16 claims
- 3127US6144325ARegister file array having a two-bit to four-bit encoderIBM·Filed 1996·Granted Nov 7, 2000·1 cites·11 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →