Inventor · disambiguated record
Ming-Chung Liang
Also filed as: LIANG MING-CHUNG
51 granted patents·12 pending applications·354 citations·filing 2001–2025
98Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD27MACRONIX INT CO LTD17TAIWAN SEMICONDUCTOR MFG6LIANG MING-CHUNG2HSIEH WEN-KUO1
Top patents by PatentIndex Score
63 records- 0197US9123656B1Organosilicate polymer mandrel for self-aligned double patterning processTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Sep 1, 2015·45 cites·20 claims
- 0296US9368349B2Cut last self-aligned litho-etch patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Jun 14, 2016·20 cites·20 claims
- 0395US9425049B2Cut first self-aligned litho-etch patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Aug 23, 2016·14 cites·20 claims
- 0495US8008206B2Double patterning strategy for contact hole and trench in photolithographyTAIWAN SEMICONDUCTOR MFG·Filed 2010·Granted Aug 30, 2011·21 cites·17 claims
- 0593US9142453B1Interconnect structure and method of forming the sameTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Sep 22, 2015·12 cites·20 claims
- 0692US6750150B2Method for reducing dimensions between patterns on a photoresistMACRONIX INT CO LTD·Filed 2001·Granted Jun 15, 2004·58 cites·21 claims
- 0791US9406511B2Self-aligned double patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Aug 2, 2016·9 cites·20 claims
- 0890US11037789B2Cut last self-aligned litho-etch patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jun 15, 2021·3 cites·20 claims
- 0990US8222151B2Double patterning strategy for contact hole and trench in photolithographyLIANG MING-CHUNG·Filed 2011·Granted Jul 17, 2012·12 cites·20 claims
- 1088US10553431B2Cut last self-aligned litho-etch patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Feb 4, 2020·3 cites·20 claims
- 1188US10522468B2Interconnect structure and methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Dec 31, 2019·5 cites·20 claims
- 1288US7030459B2Three-dimensional memory structure and manufacturing method thereofMACRONIX INT CO LTD·Filed 2005·Granted Apr 18, 2006·13 cites·17 claims
- 1387US10290535B1Integrated circuit fabrication with a passivation agentTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted May 14, 2019·5 cites·20 claims
- 1487US10256096B2Self-aligned double patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Apr 9, 2019·4 cites·20 claims
- 1587US9698016B2Cut first self-aligned litho-etch patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jul 4, 2017·3 cites·20 claims
- 1687US2025343149A1Interconnect structure with vias extending through multiple dielectric layersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 1786US10269700B2Interconnect structure and method of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Apr 23, 2019·3 cites·20 claims
- 1885US11251127B2Interconnect structure with vias extending through multiple dielectric layersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Feb 15, 2022·3 cites·20 claims
- 1985US6774051B2Method for reducing pitchMACRONIX INT CO LTD·Filed 2002·Granted Aug 10, 2004·36 cites·24 claims
- 2084US10109486B2Cut first self-aligned litho-etch patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Oct 23, 2018·2 cites·20 claims
- 2181US9953863B1Methods of forming an interconnect structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Apr 24, 2018·3 cites·20 claims
- 2276US8617986B2Integrated circuits and methods for forming the integrated circuitsLIANG MING-CHUNG·Filed 2010·Granted Dec 31, 2013·4 cites·20 claims
- 2376US2025239487A1Semiconductor device with self-aligned viasTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 2474US12444687B2Interconnect structure with vias extending through multiple dielectric layersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Oct 14, 2025·0 cites·20 claims
- 2574US9761451B2Cut last self-aligned litho-etch patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Sep 12, 2017·1 cites·20 claims
- 2674US8895445B2Method of forming via holesHSIEH WEN-KUO·Filed 2011·Granted Nov 25, 2014·5 cites·21 claims
- 2771US12293944B2Semiconductor device with self-aligned viasTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted May 6, 2025·0 cites·20 claims
- 2871US9728445B2Method for forming conducting via and damascene structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Aug 8, 2017·2 cites·15 claims
- 2970US6511902B1Fabrication method for forming rounded corner of contact window and via by two-step light etching techniqueMACRONIX INT CO LTD·Filed 2002·Granted Jan 28, 2003·13 cites·12 claims
- 3069US10157775B2Method for manufacturing a semiconductor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Dec 18, 2018·1 cites·20 claims
- 3169US9917048B2Interconnect structure and method of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Mar 13, 2018·1 cites·19 claims
- 3269US9496217B2Method and apparatus of forming a viaTSAI HSIN-YI·Filed 2009·Granted Nov 15, 2016·5 cites·20 claims
- 3368US6601596B2Apparatus for cleaning a wafer with shearing stress from slab with curved portionMACRONIX INT CO LTD·Filed 2001·Granted Aug 5, 2003·8 cites·10 claims
- 3467US7033948B2Method for reducing dimensions between patterns on a photoresistMACRONIX INT CO LTD·Filed 2003·Granted Apr 25, 2006·9 cites·6 claims
- 3565US9252060B2Reduction of OCD measurement noise by way of metal via slotsTSAI CHI-MING·Filed 2012·Granted Feb 2, 2016·2 cites·20 claims
- 3664US11521857B2Cut first self-aligned litho-etch patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Dec 6, 2022·0 cites·20 claims
- 3764US7105099B2Method of reducing pattern pitch in integrated circuitsMACRONIX INT CO LTD·Filed 2004·Granted Sep 12, 2006·9 cites·22 claims
- 3860US11018021B2Curing photo resist for improving etching selectivityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted May 25, 2021·0 cites·20 claims
- 3959US6491046B2Vertical batch type wafer cleaning apparatusMACRONIX INT CO LTD·Filed 2001·Granted Dec 10, 2002·6 cites·5 claims
- 4058US7670947B2Metal interconnect structure and process for forming sameTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Mar 2, 2010·1 cites·15 claims
- 4157US11502001B2Semiconductor device with self-aligned viasTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Nov 15, 2022·0 cites·20 claims
- 4254US9305839B2Curing photo resist for improving etching selectivityTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Apr 5, 2016·0 cites·20 claims
- 4354US7998873B2Method for fabricating low-k dielectric and Cu interconnectTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Aug 16, 2011·0 cites·20 claims
- 4454US7361604B2Method for reducing dimensions between patterns on a hardmaskMACRONIX INT CO LTD·Filed 2003·Granted Apr 22, 2008·4 cites·28 claims
- 4552US10347505B2Curing photo resist for improving etching selectivityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jul 9, 2019·0 cites·20 claims
- 4651US8354346B2Method for fabricating low-k dielectric and Cu interconnectTAIWAN SEMICONDUCTOR MFG·Filed 2011·Granted Jan 15, 2013·0 cites·16 claims
- 4749US10090167B2Semiconductor device and method of forming sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Oct 2, 2018·0 cites·19 claims
- 4848US6492214B2Method of fabricating an insulating layerMACRONIX INT CO LTD·Filed 2002·Granted Dec 10, 2002·3 cites·12 claims
- 4948US6350660B1Process for forming a shallow trench isolationMACRONIX INT CO LTD·Filed 2001·Granted Feb 26, 2002·4 cites·32 claims
- 5048US2006197180A1Three-dimensional memory structure and manufacturing method thereofLAI ERH-KUN·Filed 2006·Application pending·0 cites
Showing the top 50 of 63 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →