Inventor · disambiguated record
Pranita Kerber
Also filed as: KERBER PRANITA
94 granted patents·7 pending applications·593 citations·filing 2012–2019
99Inventor score
Top patents by PatentIndex Score
101 records- 0199US8895395B1Reduced resistance SiGe FinFET devices and method of forming sameIBM·Filed 2013·Granted Nov 25, 2014·335 cites·15 claims
- 0297US9362282B1High-K gate dielectric and metal gate conductor stack for planar field effect transistors formed on type III-V semiconductor material and silicon germanium semiconductor materialIBM·Filed 2015·Granted Jun 7, 2016·16 cites·11 claims
- 0397US8878311B2Integrated circuit having raised source drains devices with reduced silicide contact resistance and methods to fabricate sameIBM·Filed 2013·Granted Nov 4, 2014·20 cites·7 claims
- 0496US9484412B1Strained silicon—germanium integrated circuit with inversion capacitance enhancement and method to fabricate sameIBM·Filed 2015·Granted Nov 1, 2016·14 cites·20 claims
- 0596US9443873B1Structure and method for tensile and compressive strained silicon germanium with same germanium concentration by single epitaxy stepIBM·Filed 2015·Granted Sep 13, 2016·11 cites·20 claims
- 0694US10176990B2SiGe FinFET with improved junction doping controlIBM·Filed 2016·Granted Jan 8, 2019·7 cites·20 claims
- 0794US9502420B1Structure and method for highly strained germanium channel fins for high mobility pFINFETsIBM·Filed 2015·Granted Nov 22, 2016·10 cites·17 claims
- 0894US8993406B1FinFET device having a merged source drain region under contact areas and unmerged fins between contact areas, and a method of manufacturing sameIBM·Filed 2013·Granted Mar 31, 2015·14 cites·11 claims
- 0993US9443940B1Defect reduction with rotated double aspect ratio trappingIBM·Filed 2015·Granted Sep 13, 2016·9 cites·18 claims
- 1091US9484359B2MOSFET with work function adjusted metal backgateGLOBALFOUNDRIES INC·Filed 2015·Granted Nov 1, 2016·5 cites·10 claims
- 1190US9647119B1Structure and method for tensile and compressive strained silicon germanium with same germanium concentration by single epitaxy stepIBM·Filed 2016·Granted May 9, 2017·4 cites·6 claims
- 1289US9391173B2FinFET device with vertical silicide on recessed source/drain epitaxy regionsIBM·Filed 2014·Granted Jul 12, 2016·7 cites·13 claims
- 1389US9379219B1SiGe finFET with improved junction doping controlIBM·Filed 2016·Granted Jun 28, 2016·4 cites·1 claims
- 1489US9240497B2Junction field effect transistor with an epitaxially grown gate structureGLOBALFOUNDRIES INC·Filed 2014·Granted Jan 19, 2016·7 cites·15 claims
- 1589US8963248B2Semiconductor device having SSOI substrate with relaxed tensile stressIBM·Filed 2013·Granted Feb 24, 2015·8 cites·8 claims
- 1688US9530699B2Semiconductor device including gate channel having adjusted threshold voltageIBM·Filed 2015·Granted Dec 27, 2016·4 cites·6 claims
- 1788US9502408B2FinFET device including fins having a smaller thickness in a channel region, and a method of manufacturing sameGLOBALFOUNDRIES INC·Filed 2013·Granted Nov 22, 2016·9 cites·10 claims
- 1888US9018714B2Integrated circuit having raised source drains devices with reduced silicide contact resistance and methods to fabricate sameIBM·Filed 2014·Granted Apr 28, 2015·6 cites·5 claims
- 1987US9443963B2SiGe FinFET with improved junction doping controlIBM·Filed 2014·Granted Sep 13, 2016·5 cites·18 claims
- 2087US8551848B2Field effect transistor with asymmetric abrupt junction implantIBM·Filed 2012·Granted Oct 8, 2013·6 cites·6 claims
- 2186US9553166B1Asymmetric III-V MOSFET on silicon substrateIBM·Filed 2015·Granted Jan 24, 2017·4 cites·10 claims
- 2285US9773903B2Asymmetric III-V MOSFET on silicon substrateIBM·Filed 2016·Granted Sep 26, 2017·3 cites·18 claims
- 2385US9397161B1Reduced current leakage semiconductor deviceIBM·Filed 2015·Granted Jul 19, 2016·3 cites·20 claims
- 2485US8652888B2SOI device with DTI and STIIBM·Filed 2013·Granted Feb 18, 2014·6 cites·14 claims
- 2584US9627410B2Metallized junction FinFET structuresIBM·Filed 2015·Granted Apr 18, 2017·3 cites·6 claims
- 2684US9059005B2MOSFET with recessed channel film and abrupt junctionsIBM·Filed 2013·Granted Jun 16, 2015·4 cites·8 claims
- 2784US9029988B2Through silicon via in n+ epitaxy wafers with reduced parasitic capacitanceIBM·Filed 2013·Granted May 12, 2015·4 cites·5 claims
- 2884US8564064B2Controlled fin-merging for fin type FET devicesIBM·Filed 2012·Granted Oct 22, 2013·6 cites·5 claims
- 2983US9412865B1Reduced resistance short-channel InGaAs planar MOSFETIBM·Filed 2016·Granted Aug 9, 2016·3 cites·1 claims
- 3083US9276118B2FinFET device having a merge source drain region under contact areas and unmerged fins between contact areas, and a method of manufacturing sameGLOBALFOUNDRIES INC·Filed 2015·Granted Mar 1, 2016·3 cites·18 claims
- 3183US8994072B2Reduced resistance SiGe FinFET devices and method of forming sameIBM·Filed 2013·Granted Mar 31, 2015·6 cites·5 claims
- 3282US10002871B2High-K gate dielectric and metal gate conductor stack for fin-type field effect transistors formed on type III-V semiconductor material and silicon germanium semiconductor materialIBM·Filed 2017·Granted Jun 19, 2018·2 cites·19 claims
- 3381US9576806B2FinFET device with vertical silicide on recessed source/drain epitaxy regionsIBM·Filed 2016·Granted Feb 21, 2017·2 cites·20 claims
- 3481US9391091B2MOSFET with work function adjusted metal backgateGLOBALFOUNDRIES INC·Filed 2015·Granted Jul 12, 2016·2 cites·17 claims
- 3579US9590106B1Semiconductor device including epitaxially formed buried channel regionIBM·Filed 2016·Granted Mar 7, 2017·2 cites·1 claims
- 3678US9105662B1Method and structure to enhance gate induced strain effect in multigate deviceIBM·Filed 2014·Granted Aug 11, 2015·4 cites·17 claims
- 3777US8853040B2Strained thin body CMOS device having vertically raised source/drain stressors with single spacerIBM·Filed 2013·Granted Oct 7, 2014·3 cites·6 claims
- 3877US8647936B2Junction field effect transistor with an epitaxially grown gate structureIBM·Filed 2013·Granted Feb 11, 2014·3 cites·5 claims
- 3976US8962412B2Integrated circuit having raised source drains devices with reduced silicide contact resistance and methods to fabricate sameIBM·Filed 2014·Granted Feb 24, 2015·2 cites·16 claims
- 4076US8946063B2Semiconductor device having SSOI substrate with relaxed tensile stressIBM·Filed 2012·Granted Feb 3, 2015·3 cites·16 claims
- 4173US9202864B2Integrated circuit having back gating, improved isolation and reduced well resistance and method to fabricate sameIBM·Filed 2014·Granted Dec 1, 2015·2 cites·14 claims
- 4272US9741807B2FinFET device with vertical silicide on recessed source/drain epitaxy regionsIBM·Filed 2016·Granted Aug 22, 2017·1 cites·19 claims
- 4372US9627482B2Reduced current leakage semiconductor deviceIBM·Filed 2016·Granted Apr 18, 2017·1 cites·10 claims
- 4472US9595598B1Semiconductor device including epitaxially formed buried channel regionIBM·Filed 2015·Granted Mar 14, 2017·1 cites·10 claims
- 4571US9859279B2High-k gate dielectric and metal gate conductor stack for fin-type field effect transistors formed on type III-V semiconductor material and silicon germanium semiconductor materialIBM·Filed 2015·Granted Jan 2, 2018·1 cites·8 claims
- 4670US9748114B2Method for forming through silicon via in N+ epitaxy wafers with reduced parasitic capacitanceIBM·Filed 2015·Granted Aug 29, 2017·1 cites·10 claims
- 4770US9576085B2Selective importance samplingIBM·Filed 2013·Granted Feb 21, 2017·2 cites·4 claims
- 4870US9059014B2Integrated circuit diodeIBM·Filed 2013·Granted Jun 16, 2015·2 cites·7 claims
- 4970US9041009B2Method and structure for forming high-K/metal gate extremely thin semiconductor on insulator deviceIBM·Filed 2013·Granted May 26, 2015·2 cites·17 claims
- 5069US9548356B2Shallow trench isolation structuresGLOBALFOUNDRIES INC·Filed 2015·Granted Jan 17, 2017·1 cites·15 claims
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