Inventor · disambiguated record
Albert Bergemont
Also filed as: BERGEMONT ALBERT · BERGEMONT ALBERT M
164 granted patents·5 pending applications·4,871 citations·filing 1986–2024
99Inventor score
Files withNAT SEMICONDUCTOR CORP124MAXIM INTEGRATED PRODUCTS10FOVEONICS INC6SGS THOMSON MICROELECTRONICS6INTEGENSE MICROELECTRONICS INC4
Top patents by PatentIndex Score
169 records- 0198US7324387B1Low power high density random access memory flash cells and arraysMAXIM INTEGRATED PRODUCTS·Filed 2007·Granted Jan 29, 2008·211 cites·24 claims
- 0298US6208557B1EPROM and flash memory cells with source-side injection and a gate dielectric that traps hot electrons during programmingNAT SEMICONDUCTOR CORP·Filed 1999·Granted Mar 27, 2001·220 cites·6 claims
- 0398US5379253AHigh density EEPROM cell array with novel programming scheme and method of manufactureNAT SEMICONDUCTOR CORP·Filed 1992·Granted Jan 3, 1995·187 cites·18 claims
- 0497US11609131B2Wafer bonded piezoresistive and piezoelectric force sensor and related methods of manufactureNEXTINPUT INC·Filed 2022·Granted Mar 21, 2023·2 cites·20 claims
- 0596US5608243ASingle split-gate MOS transistor active pixel sensor cell with automatic anti-blooming and wide dynamic rangeNAT SEMICONDUCTOR CORP·Filed 1995·Granted Mar 4, 1997·185 cites·9 claims
- 0696US5397726ASegment-erasable flash EPROMNAT SEMICONDUCTOR CORP·Filed 1994·Granted Mar 14, 1995·136 cites·8 claims
- 0796US5397725AMethod of controlling oxide thinning in an EPROM or flash memory arrayNAT SEMICONDUCTOR CORP·Filed 1993·Granted Mar 14, 1995·165 cites·9 claims
- 0894US11243126B2Wafer bonded piezoresistive and piezoelectric force sensor and related methods of manufactureNEXTINPUT INC·Filed 2018·Granted Feb 8, 2022·6 cites·18 claims
- 0994US5422844AMemory array with field oxide islands eliminated and methodNAT SEMICONDUCTOR CORP·Filed 1993·Granted Jun 6, 1995·95 cites·5 claims
- 1093US6225163B1Process for forming high quality gate silicon dioxide layers of multiple thicknessesNAT SEMICONDUCTOR CORP·Filed 2000·Granted May 1, 2001·71 cites·8 claims
- 1193US6137723AMemory device having erasable Frohmann-Bentchkowsky EPROM cells that use a well-to-floating gate coupled voltage during erasureNAT SEMICONDUCTOR CORP·Filed 1999·Granted Oct 24, 2000·118 cites·19 claims
- 1293US5477485AMethod for programming a single EPROM or FLASH memory cell to store multiple levels of data that utilizes a floating substrateNAT SEMICONDUCTOR CORP·Filed 1995·Granted Dec 19, 1995·109 cites·5 claims
- 1391US9673316B1Vertical semiconductor device having frontside interconnectionsMAXIM INTEGRATED PRODUCTS·Filed 2013·Granted Jun 6, 2017·9 cites·8 claims
- 1490US6081451AMemory device that utilizes single-poly EPROM cells with CMOS compatible programming voltagesNAT SEMICONDUCTOR CORP·Filed 1998·Granted Jun 27, 2000·71 cites·15 claims
- 1590US5587596ASingle MOS transistor active pixel sensor cell with automatic anti-blooming and wide dynamic rangeNAT SEMICONDUCTOR CORP·Filed 1995·Granted Dec 24, 1996·103 cites·12 claims
- 1689US6414872B1Compact non-volatile memory device and memory arrayNAT SEMICONDUCTOR CORP·Filed 2000·Granted Jul 2, 2002·65 cites·20 claims
- 1789US6055185ASingle-poly EPROM cell with CMOS compatible programming voltagesNAT SEMICONDUCTOR CORP·Filed 1998·Granted Apr 25, 2000·68 cites·17 claims
- 1889US5962844AActive pixel image cell with embedded memory and pixel level signal processing capabilityFOVEON INC·Filed 1997·Granted Oct 5, 1999·121 cites·14 claims
- 1989US5761126ASingle-poly EPROM cell that utilizes a reduced programming voltage to program the cellNAT SEMICONDUCTOR CORP·Filed 1997·Granted Jun 2, 1998·71 cites·19 claims
- 2088US5940324ASingle-poly EEPROM cell that is programmable and erasable in a low-voltage environmentNAT SEMICONDUCTOR CORP·Filed 1998·Granted Aug 17, 1999·66 cites·17 claims
- 2187US7943473B2Minimum cost method for forming high density passive capacitors for replacement of discrete board capacitors using a minimum cost 3D wafer-to-wafer modular integration schemeMAXIM INTEGRATED PRODUCTS·Filed 2009·Granted May 17, 2011·15 cites·40 claims
- 2287US6137724AMemory device that utilizes single-poly EPROM cells with CMOS compatible programming voltagesNAT SEMICONDUCTOR CORP·Filed 1999·Granted Oct 24, 2000·63 cites·20 claims
- 2387US5908311AMethod for forming a mixed-signal CMOS circuit that includes non-volatile memory cellsNAT SEMICONDUCTOR CORP·Filed 1996·Granted Jun 1, 1999·58 cites·26 claims
- 2486US5688705AMethod for reducing the spacing between the horizontally adjacent floating gates of a flash EPROM arrayNAT SEMICONDUCTOR CORP·Filed 1996·Granted Nov 18, 1997·48 cites·6 claims
- 2585US6420217B1Method of an apparatus for programming an integrated fuse element to high resistance in low voltage technologyNAT SEMICONDUCTOR CORP·Filed 2000·Granted Jul 16, 2002·33 cites·10 claims
- 2685US6137722AMemory array having Frohmann-Bentchkowsky EPROM cells with a reduced number of access transistorsNAT SEMICONDUCTOR CORP·Filed 1999·Granted Oct 24, 2000·59 cites·20 claims
- 2785US5789791AMulti-finger MOS transistor with reduced gate resistanceNAT SEMICONDUCTOR CORP·Filed 1996·Granted Aug 4, 1998·82 cites·14 claims
- 2883US5982669AEPROM and flash memory cells with source-side injectionNAT SEMICONDUCTOR CORP·Filed 1998·Granted Nov 9, 1999·57 cites·7 claims
- 2983US5760458ABipolar-based active pixel sensor cell with poly contact and increased capacitive coupling to the base regionFOVEONICS INC·Filed 1996·Granted Jun 2, 1998·47 cites·27 claims
- 3083US5590068AUltra-high density alternate metal virtual ground ROMNAT SEMICONDUCTOR CORP·Filed 1995·Granted Dec 31, 1996·51 cites·5 claims
- 3182US11946816B2Wafer bonded piezoresistive and piezoelectric force sensor and related methods of manufactureNEXTINPUT INC·Filed 2023·Granted Apr 2, 2024·0 cites·17 claims
- 3282US6137721AMemory device having erasable frohmann-bentchkowsky EPROM cells that use a plate-to-floating gate coupled voltage during erasureNAT SEMICONDUCTOR CORP·Filed 1999·Granted Oct 24, 2000·50 cites·19 claims
- 3382US5047362AMethod of making large-scale EPROM memory with a checker board pattern and an improved coupling factorSGS THOMSON MICROELECTRONICS·Filed 1989·Granted Sep 10, 1991·41 cites·3 claims
- 3481US8940631B1Methods of forming coaxial feedthroughs for 3D integrated circuitsSRIDHAR UPPILI·Filed 2013·Granted Jan 27, 2015·5 cites·13 claims
- 3581US5808937ASelf-convergent method for programming FLASH and EEPROM memory cells that moves the threshold voltage from an erased threshold voltage range to one of a plurality of programmed threshold voltage rangesNAT SEMICONDUCTOR CORP·Filed 1997·Granted Sep 15, 1998·50 cites·25 claims
- 3681US5557567AMethod for programming an AMG EPROM or flash memory when cells of the array are formed to store multiple bits of dataNAT SEMICONDUCTOR CORP·Filed 1995·Granted Sep 17, 1996·50 cites·6 claims
- 3781US5436478AFast access AMG EPROM with segment select transistors which have an increased widthNAT SEMICONDUCTOR CORP·Filed 1994·Granted Jul 25, 1995·37 cites·4 claims
- 3881US5212541AContactless, 5v, high speed eprom/flash eprom array utilizing cells programmed using source side injectionNAT SEMICONDUCTOR CORP·Filed 1991·Granted May 18, 1993·52 cites·5 claims
- 3980US8686543B23D chip package with shielded structuresBERGEMONT ALBERT·Filed 2011·Granted Apr 1, 2014·7 cites·20 claims
- 4080US5346842AMethod of making alternate metal/source virtual ground flash EPROM cell arrayNAT SEMICONDUCTOR CORP·Filed 1992·Granted Sep 13, 1994·36 cites·2 claims
- 4179US6157574AErasable frohmann-bentchkowsky memory transistor that stores multiple bits of dataNAT SEMICONDUCTOR CORP·Filed 1999·Granted Dec 5, 2000·43 cites·15 claims
- 4279US6087211AMethod for forming a semiconductor device having non-volatile memory cells, High-voltage transistors, and low-voltage, deep sub-micron transistorsNAT SEMICONDUCTOR CORP·Filed 1998·Granted Jul 11, 2000·45 cites·12 claims
- 4379US5998280AModified recessed locos isolation process for deep sub-micron device processesNAT SEMICONDUCTOR CORP·Filed 1998·Granted Dec 7, 1999·57 cites·16 claims
- 4478US6563731B1EEPROM memory cell array embedded on core CMOSNAT SEMICONDUCTOR CORP·Filed 2000·Granted May 13, 2003·19 cites·17 claims
- 4578US6498084B2Method of forming high density EEPROM cellMAXIM INTEGRATED PRODUCTS·Filed 2001·Granted Dec 24, 2002·25 cites·20 claims
- 4677US8405115B2Light sensor using wafer-level packagingSAMOILOV ARKADII V·Filed 2009·Granted Mar 26, 2013·8 cites·21 claims
- 4777US6368917B1Methods of fabricating floating gate semiconductor device with reduced erase voltageNAT SEMICONDUCTOR CORP·Filed 2000·Granted Apr 9, 2002·17 cites·17 claims
- 4877US6184557B1I/O circuit that utilizes a pair of well structures as resistors to delay an ESD event and as diodes for ESD protectionNAT SEMICONDUCTOR CORP·Filed 1999·Granted Feb 6, 2001·40 cites·14 claims
- 4977US5615152AMethod of erasing a high density contactless flash EPROM arrayNAT SEMICONDUCTOR CORP·Filed 1996·Granted Mar 25, 1997·41 cites·2 claims
- 5077US5484741AMethod of making increased-density flash EPROM that requires less area to form the metal bit line-to-drain contactsNAT SEMICONDUCTOR CORP·Filed 1995·Granted Jan 16, 1996·32 cites·10 claims
Showing the top 50 of 169 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →