Inventor · disambiguated record
Shai Rotem
Also filed as: ROTEM SHAI
25 granted patents·3 pending applications·397 citations·filing 1992–2019
96Inventor score
Top patents by PatentIndex Score
28 records- 0195US7664970B2Method and apparatus for a zero voltage processor sleep stateINTEL CORP·Filed 2005·Granted Feb 16, 2010·38 cites·10 claims
- 0291US7523327B2System and method of coherent data transfer during processor idle statesINTEL CORP·Filed 2005·Granted Apr 21, 2009·19 cites·19 claims
- 0383US8707062B2Method and apparatus for powered off processor core modeJAHAGIRDAR SANJEEV·Filed 2010·Granted Apr 22, 2014·4 cites·20 claims
- 0477US9841807B2Method and apparatus for a zero voltage processor sleep stateINTEL CORP·Filed 2015·Granted Dec 12, 2017·1 cites·24 claims
- 0576US9141180B2Method and apparatus for a zero voltage processor sleep stateINTEL CORP·Filed 2015·Granted Sep 22, 2015·1 cites·6 claims
- 0673US10955885B2Methods and systems to control power gates during an active state of a gated domain based on load conditions of the gated domainINTEL CORP·Filed 2019·Granted Mar 23, 2021·1 cites·20 claims
- 0773US5465216AAutomatic design verificationINTEL CORP·Filed 1993·Granted Nov 7, 1995·80 cites·20 claims
- 0872US7112979B2Testing arrangement to distribute integrated circuitsINTEL CORP·Filed 2002·Granted Sep 26, 2006·12 cites·14 claims
- 0972US5265227AParallel protection checking in an address translation look-aside bufferINTEL CORP·Filed 1992·Granted Nov 23, 1993·59 cites·17 claims
- 1071US9966940B2Charge-saving power-gate apparatus and methodROTEM SHAI·Filed 2011·Granted May 8, 2018·4 cites·17 claims
- 1167US7233162B2Arrangements having IC voltage and thermal resistance designated on a per IC basisINTEL CORP·Filed 2005·Granted Jun 19, 2007·3 cites·14 claims
- 1266US5931944ABranch instruction handling in a self-timed marking systemINTEL CORP·Filed 1997·Granted Aug 3, 1999·49 cites·23 claims
- 1364US9870044B2Method and apparatus for a zero voltage processor sleep stateINTEL CORP·Filed 2016·Granted Jan 16, 2018·0 cites·21 claims
- 1463US9874925B2Method and apparatus for a zero voltage processor sleep stateINTEL CORP·Filed 2015·Granted Jan 23, 2018·0 cites·5 claims
- 1563US9223389B2Method and apparatus for a zero voltage processorINTEL CORP·Filed 2014·Granted Dec 29, 2015·0 cites·19 claims
- 1663US9223390B2Method and apparatus for a zero voltage processorINTEL CORP·Filed 2014·Granted Dec 29, 2015·0 cites·19 claims
- 1762US9235258B2Method and apparatus for a zero voltage processorINTEL CORP·Filed 2014·Granted Jan 12, 2016·0 cites·18 claims
- 1858US5948096AApparatus and method for self-timed marking of variable length instructions having length-affecting prefix bytesINTEL CORP·Filed 1997·Granted Sep 7, 1999·36 cites·18 claims
- 1957US2013013945A1Method and apparatus for a zero voltage processor sleep stateJAHAGIRDAR SANJEEV·Filed 2012·Application pending·0 cites
- 2055US6314553B1Circuit synthesis and verification using relative timingINTEL CORP·Filed 1998·Granted Nov 6, 2001·29 cites·29 claims
- 2155US2012072750A1Method and apparatus for a zero voltage processor sleep stateJAHAGIRDAR SANJEEV·Filed 2011·Application pending·0 cites
- 2252US7109737B2Arrangements having IC voltage and thermal resistance designated on a per IC basisINTEL CORP·Filed 2004·Granted Sep 19, 2006·4 cites·14 claims
- 2352US5574872AMethod and apparatus for controlling the saving of pipelines in pipelined processors during trap handlingINTEL CORP·Filed 1994·Granted Nov 12, 1996·26 cites·12 claims
- 2452US2009193274A1System And Method of Coherent Data Transfer During Processor Idle StatesINTEL CORP·Filed 2009·Application pending·0 cites
- 2551US10536139B2Charge-saving power-gate apparatus and methodINTEL CORP·Filed 2018·Granted Jan 14, 2020·0 cites·16 claims
- 2645US5978899AApparatus and method for parallel processing and self-timed serial marking of variable length instructionsINTEL CORP·Filed 1997·Granted Nov 2, 1999·18 cites·37 claims
- 2744US10228738B2Methods and systems to control power gates during an active state of a gated domain based on load conditions of the gated domainZELIKSON MICHAEL·Filed 2011·Granted Mar 12, 2019·0 cites·27 claims
- 2840US5941982AEfficient self-timed marking of lengthy variable length instructionsINTEL CORP·Filed 1997·Granted Aug 24, 1999·13 cites·18 claims
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