Inventor · disambiguated record
Gerald L Esch, Jr.
Also filed as: ESCH GERALD L JR · ESCH JR GERALD L · ESCH JR GERALD LEE
7 granted patents·1 pending application·323 citations·filing 1998–2010
86Inventor score
Files withAGILENT TECHNOLOGIES INC4AVAGO TECHNOLOGIES ENTPR IP SINGAPORE PTE LTD1AVEGO TECHNOLOGIES ECBU IP SINGAPORE PTE LTD1ESCH GERALD L JR1HEWLETT PACKARD CO1
Top patents by PatentIndex Score
8 records- 0195US6064224ACalibration sharing for CMOS output driverHEWLETT PACKARD CO·Filed 1998·Granted May 16, 2000·160 cites·10 claims
- 0293US6118310ADigitally controlled output driver and method for impedance matchingAGILENT TECHNOLOGIES INC·Filed 1998·Granted Sep 12, 2000·134 cites·16 claims
- 0375US7982516B1RC-based delay element and method for reducing frequency induced delay variationAVAGO TECHNOLOGIES ENTPR IP SINGAPORE PTE LTD·Filed 2010·Granted Jul 19, 2011·5 cites·20 claims
- 0470US6268750B1Flattened resistance response for an electrical output driverAGILENT TECHNOLOGIES INC·Filed 2000·Granted Jul 31, 2001·15 cites·17 claims
- 0550US6665218B2Self calibrating register for source synchronous clocking systemsAGILENT TECHNOLOGIES INC·Filed 2001·Granted Dec 16, 2003·6 cites·9 claims
- 0648US8035438B2Integrated circuits and methods for enabling high-speed AC-coupled networks to suppress noise during low-frequency operationAVEGO TECHNOLOGIES ECBU IP SINGAPORE PTE LTD·Filed 2009·Granted Oct 11, 2011·3 cites·20 claims
- 0744US2005262464A1Integrated circuit routing resource optimization algorithm for random port orderingESCH GERALD L JR·Filed 2005·Application pending·0 cites
- 0843US7010641B2Integrated circuit routing resource optimization algorithm for random port orderingAGILENT TECHNOLOGIES INC·Filed 2003·Granted Mar 7, 2006·0 cites·9 claims
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