Inventor · disambiguated record
Alvaro Maury
Also filed as: MAURY ALVARO
26 granted patents·5 pending applications·772 citations·filing 1984–2007
97Inventor score
Files withLUCENT TECHNOLOGIES INC10AGERE SYSTEMS INC7AGERE SYST GUARDIAN CORP6CHARTERED SEMICONDUCTOR MFG4AMERICAN TELEPHONE & TELEGRAPH1
Top patents by PatentIndex Score
31 records- 0196US6910907B2Contact for use in an integrated circuit and a method of manufacture thereforAGERE SYSTEMS INC·Filed 2003·Granted Jun 28, 2005·115 cites·20 claims
- 0295US6033293AApparatus for performing chemical-mechanical polishingLUCENT TECHNOLOGIES INC·Filed 1997·Granted Mar 7, 2000·140 cites·10 claims
- 0388US6984166B2Zone polishing using variable slurry solid contentCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Jan 10, 2006·35 cites·17 claims
- 0487US6372605B1Additional etching to decrease polishing time for shallow-trench isolation in semiconductor processingAGERE SYST GUARDIAN CORP·Filed 2000·Granted Apr 16, 2002·54 cites·19 claims
- 0584US6008123AMethod for using a hardmask to form an opening in a semiconductor substrateLUCENT TECHNOLOGIES INC·Filed 1997·Granted Dec 28, 1999·77 cites·25 claims
- 0681US6261958B1Method for performing chemical-mechanical polishingLUCENT TECHNOLOGIES INC·Filed 1999·Granted Jul 17, 2001·44 cites·13 claims
- 0773US6624039B1Alignment mark having a protective oxide layer for use with shallow trench isolationLUCENT TECHNOLOGIES INC·Filed 2000·Granted Sep 23, 2003·21 cites·17 claims
- 0871US6821886B1IMP TiN barrier metal processCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Nov 23, 2004·19 cites·45 claims
- 0971US4569722AEthylene glycol etch for processes using metal silicidesAT & T BELL LAB·Filed 1984·Granted Feb 11, 1986·29 cites·7 claims
- 1070US6309900B1Test structures for testing planarization systems and methods for using sameAGERE SYST GUARDIAN CORP·Filed 2000·Granted Oct 30, 2001·14 cites·4 claims
- 1170US6146975AShallow trench isolationLUCENT TECHNOLOGIES INC·Filed 1998·Granted Nov 14, 2000·40 cites·12 claims
- 1269US6110012AChemical-mechanical polishing apparatus and methodLUCENT TECHNOLOGIES INC·Filed 1998·Granted Aug 29, 2000·34 cites·12 claims
- 1367US6051500ADevice and method for polishing a semiconductor substrateLUCENT TECHNOLOGIES INC·Filed 1998·Granted Apr 18, 2000·35 cites·14 claims
- 1463US7811944B2Semiconductor device and a method of manufacture thereforAGERE SYSTEMS INC·Filed 2005·Granted Oct 12, 2010·1 cites·8 claims
- 1563US6354910B1Apparatus and method for in-situ measurement of polishing pad thickness lossAGERE SYST GUARDIAN CORP·Filed 2000·Granted Mar 12, 2002·11 cites·23 claims
- 1660US7163438B2Zone polishing using variable slurry solid contentCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Jan 16, 2007·2 cites·8 claims
- 1759US7005724B2Semiconductor device and a method of manufacture thereforAGERE SYSTEMS INC·Filed 2004·Granted Feb 28, 2006·5 cites·16 claims
- 1858US6368972B1Method for making an integrated circuit including alignment marksAGERE SYST GUARDIAN CORP·Filed 1999·Granted Apr 9, 2002·23 cites·25 claims
- 1957US4814291AMethod of making devices having thin dielectric layersAMERICAN TELEPHONE & TELEGRAPH·Filed 1986·Granted Mar 21, 1989·27 cites·12 claims
- 2053US6287173B1Longer lifetime warm-up wafers for polishing systemsLUCENT TECHNOLOGIES INC·Filed 2000·Granted Sep 11, 2001·5 cites·21 claims
- 2152US6274933B1Integrated circuit device having a planar interlevel dielectric layerAGERE SYST GUARDIAN CORP·Filed 1999·Granted Aug 14, 2001·18 cites·14 claims
- 2251US6110831AMethod of mechanical polishingLUCENT TECHNOLOGIES INC·Filed 1997·Granted Aug 29, 2000·17 cites·16 claims
- 2349US2008079083A1Semiconductor device and a method of manufacture thereforAGERE SYSTEMS INC·Filed 2007·Application pending·0 cites
- 2447US6548906B2Method for reducing a metal seam in an interconnect structure and a device manufactured therebyAGERE SYSTEMS INC·Filed 2001·Granted Apr 15, 2003·2 cites·9 claims
- 2544US2009108359A1A semiconductor device and method of manufacture thereforAGERE SYSTEMS INC·Filed 2007·Application pending·0 cites
- 2638US2005106835A1Trench isolation structure and method of manufacture thereforAGERE SYSTEMS INC·Filed 2003·Application pending·0 cites
- 2735US8872311B2Semiconductor device and a method of manufacture thereforROSSI NACE·Filed 2004·Granted Oct 28, 2014·0 cites·7 claims
- 2835US2005134857A1Method to monitor silicide formation on product wafersCHARTERED SEMICONDUCTOR MFG·Filed 2003·Application pending·0 cites
- 2929US6281128B1Wafer carrier modification for reduced extraction forceAGERE SYST GUARDIAN CORP·Filed 1999·Granted Aug 28, 2001·3 cites·6 claims
- 3029US6217419B1Chemical-mechanical polisherLUCENT TECHNOLOGIES INC·Filed 1999·Granted Apr 17, 2001·1 cites·14 claims
- 3126US2002001876A1Method of making an integrated circuit device having a planar interlevel dielectric layerFiled 1999·Application pending·0 cites
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