Inventor · disambiguated record
Robert A. Shearer
Also filed as: SHEARER III ROBERT A · SHEARER ROBERT · SHEARER ROBERT A · SHEARER ROBERT ALLEN
189 granted patents·35 pending applications·3,200 citations·filing 2003–2019
99Inventor score
Files withIBM115MEJDRICH ERIC O22MICROSOFT TECHNOLOGY LICENSING LLC21MUFF ADAM J11SHEARER ROBERT ALLEN7
Top patents by PatentIndex Score
224 records- 0199US11068318B2Dynamic thread status retrieval using inter-thread communicationIBM·Filed 2019·Granted Jul 20, 2021·143 cites·11 claims
- 0299US7893936B2Generating efficient spatial indexes for predictably dynamic objectsIBM·Filed 2007·Granted Feb 22, 2011·135 cites·19 claims
- 0399US7884819B2Pixel color accumulation in a ray tracing image processing systemIBM·Filed 2006·Granted Feb 8, 2011·142 cites·11 claims
- 0499US7808500B2Method for improving spatial index efficiency by jittering splitting planesIBM·Filed 2006·Granted Oct 5, 2010·138 cites·12 claims
- 0599US7782318B2Method for reducing network bandwidth by delaying shadow ray generationIBM·Filed 2006·Granted Aug 24, 2010·167 cites·20 claims
- 0699US7719532B2Efficient and flexible data organization for acceleration data structure nodesIBM·Filed 2007·Granted May 18, 2010·137 cites·20 claims
- 0798US8234234B2Utilizing ray tracing for enhanced artificial intelligence path-findingSHEARER ROBERT ALLEN·Filed 2007·Granted Jul 31, 2012·148 cites·22 claims
- 0898US8018453B2Deferred acceleration data structure optimization for improved performanceIBM·Filed 2007·Granted Sep 13, 2011·139 cites·12 claims
- 0998US7940265B2Multiple spacial indexes for dynamic scene management in graphics renderingIBM·Filed 2006·Granted May 10, 2011·133 cites·19 claims
- 1098US7773087B2Dynamically configuring and selecting multiple ray tracing intersection methodsIBM·Filed 2007·Granted Aug 10, 2010·146 cites·5 claims
- 1197US8139780B2Using ray tracing for real time audio synthesisSHEARER ROBERT ALLEN·Filed 2007·Granted Mar 20, 2012·134 cites·20 claims
- 1297US8089481B2Updating frame divisions based on ray tracing image processing system performanceSHEARER ROBERT A·Filed 2006·Granted Jan 3, 2012·133 cites·25 claims
- 1396US8261025B2Software pipelining on a network on chipMEJDRICH ERIC O·Filed 2007·Granted Sep 4, 2012·45 cites·15 claims
- 1496US8020168B2Dynamic virtual software pipelining on a network on chipIBM·Filed 2008·Granted Sep 13, 2011·65 cites·20 claims
- 1596US8004518B2Combined spatial index for static and dynamic objects within a three-dimensional sceneIBM·Filed 2007·Granted Aug 23, 2011·133 cites·20 claims
- 1696US7973804B2Image processing with highly threaded texture fragment generationIBM·Filed 2008·Granted Jul 5, 2011·51 cites·25 claims
- 1796US7796128B2Dynamically load balancing game physics using real-time object scalingIBM·Filed 2007·Granted Sep 14, 2010·139 cites·20 claims
- 1895US8661455B2Performance event triggering through direct interthread communication on a network on chipMEJDRICH ERIC O·Filed 2009·Granted Feb 25, 2014·45 cites·14 claims
- 1995US8490110B2Network on chip with a low latency, high bandwidth application messaging interconnectHOOVER RUSSELL D·Filed 2008·Granted Jul 16, 2013·49 cites·16 claims
- 2095US7958340B2Monitoring software pipeline performance on a network on chipIBM·Filed 2008·Granted Jun 7, 2011·43 cites·16 claims
- 2194US7688320B2Methods and systems for texture prefetching based on a most recently hit primitive algorithmIBM·Filed 2006·Granted Mar 30, 2010·35 cites·17 claims
- 2293US8140832B2Single step mode in a software pipeline within a highly threaded network on a chip microprocessorMEJDRICH ERIC O·Filed 2009·Granted Mar 20, 2012·34 cites·16 claims
- 2393US7814303B2Execution of a sequence of vector instructions preceded by a swizzle sequence instruction specifying data element shuffle orders respectivelyIBM·Filed 2008·Granted Oct 12, 2010·34 cites·25 claims
- 2492US9582277B2Indirect instruction predicationIBM·Filed 2016·Granted Feb 28, 2017·6 cites·5 claims
- 2592US9292290B2Instruction set architecture with opcode lookup using memory attributeIBM·Filed 2013·Granted Mar 22, 2016·13 cites·11 claims
- 2692US9147078B2Instruction set architecture with secure clear instructions for protecting processing unit architected state informationIBM·Filed 2013·Granted Sep 29, 2015·15 cites·12 claims
- 2791US9354884B2Processor with hybrid pipeline capable of operating in out-of-order and in-order modesIBM·Filed 2013·Granted May 31, 2016·12 cites·22 claims
- 2891US8751830B2Memory address translation-based data encryption/compressionMUFF ADAM J·Filed 2012·Granted Jun 10, 2014·16 cites·22 claims
- 2991US8405670B2Rolling texture context data structure for maintaining texture data in a multithreaded image processing pipelineMEJDRICH ERIC O·Filed 2010·Granted Mar 26, 2013·14 cites·25 claims
- 3091US8350846B2Updating ray traced acceleration data structures between frames based on changing perspectiveIBM·Filed 2009·Granted Jan 8, 2013·25 cites·25 claims
- 3190US10185378B2Prioritized sequencing of device inrush currentMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2016·Granted Jan 22, 2019·8 cites·20 claims
- 3290US8719508B2Near neighbor data cache sharingIBM·Filed 2012·Granted May 6, 2014·12 cites·8 claims
- 3390US8593459B2Tree insertion depth adjustment based on view frustum and distance cullingMEJDRICH ERIC OLIVER·Filed 2012·Granted Nov 26, 2013·11 cites·25 claims
- 3490US7818503B2Method and apparatus for memory utilizationIBM·Filed 2006·Granted Oct 19, 2010·17 cites·20 claims
- 3589US8898396B2Software pipelining on a network on chipMEJDRICH ERIC O·Filed 2012·Granted Nov 25, 2014·10 cites·15 claims
- 3689US8619078B2Parallelized ray tracingMEJDRICH ERIC O·Filed 2010·Granted Dec 31, 2013·12 cites·20 claims
- 3789US8587596B2Multithreaded software rendering pipeline with dynamic performance-based reallocation of raster threadsMEJDRICH ERIC O·Filed 2010·Granted Nov 19, 2013·12 cites·23 claims
- 3888US9710274B2Extensible execution unit interface architecture with multiple decode logic and multiple execution unitsIBM·Filed 2016·Granted Jul 18, 2017·4 cites·16 claims
- 3988US9619234B2Indirect instruction predicationIBM·Filed 2016·Granted Apr 11, 2017·4 cites·20 claims
- 4088US9256574B2Dynamic thread status retrieval using inter-thread communicationIBM·Filed 2013·Granted Feb 9, 2016·7 cites·11 claims
- 4188US8990833B2Indirect inter-thread communication using a shared pool of inboxesKUESEL JAMIE R·Filed 2011·Granted Mar 24, 2015·12 cites·22 claims
- 4287US9354887B2Instruction buffer bypass of target instruction in response to partial flushMEJDRICH ERIC O·Filed 2010·Granted May 31, 2016·11 cites·24 claims
- 4387US9183399B2Instruction set architecture with secure clear instructions for protecting processing unit architected state informationIBM·Filed 2013·Granted Nov 10, 2015·8 cites·24 claims
- 4486US9652239B2Instruction set architecture with opcode lookup using memory attributeIBM·Filed 2016·Granted May 16, 2017·3 cites·12 claims
- 4586US9652238B2Instruction set architecture with opcode lookup using memory attributeIBM·Filed 2016·Granted May 16, 2017·3 cites·20 claims
- 4686US9594557B2Floating point execution unit for calculating packed sum of absolute differencesIBM·Filed 2016·Granted Mar 14, 2017·3 cites·18 claims
- 4786US9594562B2Extensible execution unit interface architecture with multiple decode logic and multiple execution unitsIBM·Filed 2016·Granted Mar 14, 2017·3 cites·20 claims
- 4886US9594556B2Floating point execution unit for calculating packed sum of absolute differencesIBM·Filed 2016·Granted Mar 14, 2017·3 cites·20 claims
- 4986US9542184B2Local instruction loop buffer utilizing execution unit register fileIBM·Filed 2016·Granted Jan 10, 2017·3 cites·15 claims
- 5086US9501279B2Local instruction loop buffer utilizing execution unit register fileIBM·Filed 2016·Granted Nov 22, 2016·3 cites·9 claims
Showing the top 50 of 224 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →