Inventor · disambiguated record
Michael D. Church
Also filed as: CHURCH MICHAEL · CHURCH MICHAEL D · CHURCH MICHAEL DAVID
45 granted patents·7 pending applications·672 citations·filing 1992–2015
98Inventor score
Top patents by PatentIndex Score
52 records- 0197US5856695ABiCMOS devicesHARRIS CORP·Filed 1992·Granted Jan 5, 1999·170 cites·4 claims
- 0293US8320180B2Multiple time programmable (MTP) PMOS floating gate-based non-volatile memory device for a general purpose CMOS technology with thick gate oxideKALNITSKY ALEXANDER·Filed 2011·Granted Nov 27, 2012·15 cites·25 claims
- 0391US7903465B2Memory array of floating gate-based non-volatile memory cellsINTERSIL INC·Filed 2007·Granted Mar 8, 2011·20 cites·10 claims
- 0491US7688627B2Flash memory array of floating gate-based non-volatile memory cellsINTERSIL INC·Filed 2007·Granted Mar 30, 2010·20 cites·15 claims
- 0591US5416351AElectrostatic discharge protectionHARRIS CORP·Filed 1992·Granted May 16, 1995·93 cites·13 claims
- 0690US7542342B2Multiple time programmable (MTP) PMOS floating gate-based non-volatile memory device for a general-purpose CMOS technology with thick gate oxideINTERSIL INC·Filed 2006·Granted Jun 2, 2009·23 cites·23 claims
- 0784US5851864AMethod of fabricating BiCMOS devicesHARRIS CORP·Filed 1997·Granted Dec 22, 1998·51 cites·18 claims
- 0882US7750426B2Junction barrier Schottky diode with dual silicidesINTERSIL INC·Filed 2007·Granted Jul 6, 2010·7 cites·6 claims
- 0979US5481129AAnalog-to-digital converterHARRIS CORP·Filed 1995·Granted Jan 2, 1996·41 cites·14 claims
- 1077US8000139B2Multiple time programmable (MTP) PMOS floating gate-based non-volatile memory device for a general purpose CMOS technology with thick gate oxideINTERSIL INC·Filed 2009·Granted Aug 16, 2011·7 cites·12 claims
- 1177US7700977B2Integrated circuit with a subsurface diodeINTERSIL INC·Filed 2008·Granted Apr 20, 2010·8 cites·10 claims
- 1277US5994755AAnalog-to-digital converter and method of fabricationINTERSIL CORP·Filed 1996·Granted Nov 30, 1999·39 cites·14 claims
- 1376US8426745B2Thin film resistorGAUL STEPHEN JOSPEH·Filed 2010·Granted Apr 23, 2013·10 cites·22 claims
- 1476US8268693B2Method for fabricating a radiation hardened deviceGAUL STEPHEN JOSEPH·Filed 2010·Granted Sep 18, 2012·4 cites·16 claims
- 1576US6798024B1BiCMOS process with low temperature coefficient resistor (TCRL)INTERSIL INC·Filed 2000·Granted Sep 28, 2004·25 cites·18 claims
- 1675US6621116B2Enhanced EPROM structures with accentuated hot electron generation regionsFiled 2001·Granted Sep 16, 2003·20 cites·5 claims
- 1775US6329260B1Analog-to-digital converter and method of fabricationINTERSIL INC·Filed 1999·Granted Dec 11, 2001·32 cites·16 claims
- 1874US8274160B2Active area bonding compatible high current structuresGASNER JOHN T·Filed 2010·Granted Sep 25, 2012·3 cites·22 claims
- 1974US8101977B2Ballasted polycrystalline fuseCHURCH MICHAEL DAVID·Filed 2007·Granted Jan 24, 2012·5 cites·14 claims
- 2073US7829970B2Junction barrier schottky diode having high reverse blocking voltageINTERSIL INC·Filed 2008·Granted Nov 9, 2010·5 cites·11 claims
- 2170US8345488B2Flash memory array of floating gate-based non-volatile memory cellsINTERSIL INC·Filed 2011·Granted Jan 1, 2013·3 cites·6 claims
- 2269US8101511B2Method of manufacturing a junction barrier Schottky diode with dual silicidesGIRDHAR DEV ALOK·Filed 2010·Granted Jan 24, 2012·2 cites·6 claims
- 2368US7795130B2Active area bonding compatible high current structuresINTERSIL INC·Filed 2007·Granted Sep 14, 2010·3 cites·11 claims
- 2467US7224074B2Active area bonding compatible high current structuresINTERSIL INC·Filed 2005·Granted May 29, 2007·3 cites·57 claims
- 2563US8315100B2Memory array of floating gate-based non-volatile memory cellsHAGGAG HOSAM·Filed 2011·Granted Nov 20, 2012·2 cites·7 claims
- 2663US7944745B2Flash memory array of floating gate-based non-volatile memory cellsINTERSIL INC·Filed 2010·Granted May 17, 2011·2 cites·5 claims
- 2763US7804143B2Radiation hardened deviceINTERSIL INC·Filed 2009·Granted Sep 28, 2010·2 cites·12 claims
- 2862US6921690B2Method of fabricating enhanced EPROM structures with accentuated hot electron generation regionsINTERSIL INC·Filed 2001·Granted Jul 26, 2005·10 cites·18 claims
- 2960US7005369B2Active area bonding compatible high current structuresINTERSIL AMERICAN INC·Filed 2003·Granted Feb 28, 2006·8 cites·44 claims
- 3060US6812108B2BICMOS process with low temperature coefficient resistor (TCRL)INTERSIL CORP·Filed 2003·Granted Nov 2, 2004·9 cites·41 claims
- 3158US6566705B1Enhanced EPROM structures with accentuated hot electron generation regionsINTERSIL INC·Filed 2001·Granted May 20, 2003·8 cites·4 claims
- 3257US8796739B2Ballasted polycrystalline fuseINTERSIL CORP·Filed 2013·Granted Aug 5, 2014·0 cites·14 claims
- 3356US8946912B2Active area bonding compatible high current structuresINTERSIL INC·Filed 2013·Granted Feb 3, 2015·0 cites·15 claims
- 3454US8652960B2Active area bonding compatible high current structuresINTERSIL INC·Filed 2012·Granted Feb 18, 2014·0 cites·19 claims
- 3551US8569896B2Active area bonding compatible high current structuresGASNER JOHN T·Filed 2012·Granted Oct 29, 2013·0 cites·19 claims
- 3650US8728875B2Ballasted polycrystalline fuseCHURCH MICHAEL DAVID·Filed 2012·Granted May 20, 2014·0 cites·14 claims
- 3750US8647971B2Method of manufacturing junction barrier schottky diode with dual silicidesGIRDHAR DEV ALOK·Filed 2012·Granted Feb 11, 2014·0 cites·15 claims
- 3846US5817564ADouble diffused MOS device and methodHARRIS CORP·Filed 1996·Granted Oct 6, 1998·12 cites·6 claims
- 3945US2015235968A1Method of forming an insulator layer in a semiconductor structure and structures resulting therefromIntersil Americas LLC·Filed 2015·Application pending·0 cites
- 4044US6492225B1Method of fabricating enhanced EPROM structures with accentuated hot electron generation regionsINTERSIL INC·Filed 2001·Granted Dec 10, 2002·2 cites·10 claims
- 4142US8325522B2Memory array of floating gate-based non-volatile memory cellsHAGGAG HOSAM·Filed 2011·Granted Dec 4, 2012·0 cites·11 claims
- 4242US8218370B2Memory array of floating gate-based non-volatile memory cellsHAGGAG HOSAM·Filed 2011·Granted Jul 10, 2012·0 cites·20 claims
- 4341US6350640B1CMOS integrated circuit architecture incorporating deep implanted emitter region to form auxiliary bipolar transistorINTERSIL INC·Filed 1994·Granted Feb 26, 2002·8 cites·21 claims
- 4440US9147613B2Method of forming an insulator layer in a semiconductor structure and structures resulting therefromCHURCH MICHAEL D·Filed 2010·Granted Sep 29, 2015·0 cites·10 claims
- 4540US2009032885A1Buried Isolation LayerINTERSIL INC·Filed 2007·Application pending·0 cites
- 4639US7709907B2ESD structureINTERSIL INC·Filed 2005·Granted May 4, 2010·0 cites·11 claims
- 4739US2011140232A1Methods of forming a thermal conduction region in a semiconductor structure and structures resulting therefromINTERSIL INC·Filed 2010·Application pending·0 cites
- 4838US8368166B2Junction barrier Schottky diodeINTERSIL INC·Filed 2010·Granted Feb 5, 2013·0 cites·11 claims
- 4938US2007247915A1Multiple time programmable (MTP) PMOS floating gate-based non-volatile memory device for a general-purpose CMOS technology with thick gate oxideINTERSIL INC·Filed 2006·Application pending·0 cites
- 5038US2008246305A1Arm rest for an automotive type doorCHURCH MICHAEL·Filed 2008·Application pending·0 cites
Showing the top 50 of 52 patent records by PatentIndex Score.
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