Inventor · disambiguated record
Chad B. Mcbride
Also filed as: MCBRIDE CHAD · MCBRIDE CHAD B · MCBRIDE CHAD BALLING
52 granted patents·16 pending applications·181 citations·filing 1998–2023
98Inventor score
Top patents by PatentIndex Score
68 records- 0194US10628345B2Enhancing processing performance of a DNN module by bandwidth control of fabric interfaceMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2018·Granted Apr 21, 2020·6 cites·22 claims
- 0293US11909422B2Neural network processor using compression and decompression of activation data to reduce memory bandwidth utilizationMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2022·Granted Feb 20, 2024·1 cites·5 claims
- 0390US7458174B1Needle punch stretch hoopPROVO CRAFT & NOVELTY INC·Filed 2007·Granted Dec 2, 2008·16 cites·22 claims
- 0488US11100390B2Power-efficient deep neural network module configured for layer and operation fencing and dependency managementMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2018·Granted Aug 24, 2021·3 cites·20 claims
- 0587US10540584B2Queue management for direct memory accessMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Jan 21, 2020·3 cites·17 claims
- 0684US11476869B2Dynamically partitioning workload in a deep neural network module to reduce power consumptionMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2018·Granted Oct 18, 2022·2 cites·18 claims
- 0784US11405051B2Enhancing processing performance of artificial intelligence/machine hardware by data sharing and distribution as well as reuse of data in neuron buffer/line bufferMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2018·Granted Aug 2, 2022·2 cites·22 claims
- 0884US11256976B2Dynamic sequencing of data partitions for optimizing memory utilization and performance of neural networksMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Feb 22, 2022·2 cites·22 claims
- 0984US11182667B2Minimizing memory reads and increasing performance by leveraging aligned blob data in a processing unit of a neural network environmentMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Nov 23, 2021·2 cites·22 claims
- 1084US10795836B2Data processing performance enhancement for neural networks using a virtualized data iteratorMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Oct 6, 2020·2 cites·20 claims
- 1183US11010315B2Flexible hardware for high throughput vector dequantization with dynamic vector length and codebook sizeMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2018·Granted May 18, 2021·2 cites·22 claims
- 1279US11528033B2Neural network processor using compression and decompression of activation data to reduce memory bandwidth utilizationMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2018·Granted Dec 13, 2022·1 cites·20 claims
- 1379US11100391B2Power-efficient deep neural network module configured for executing a layer descriptor listMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2018·Granted Aug 24, 2021·1 cites·20 claims
- 1478US11722147B2Dynamic sequencing of data partitions for optimizing memory utilization and performance of neural networksMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2022·Granted Aug 8, 2023·0 cites·20 claims
- 1576US6836767B2Pipelined hardware implementation of a neural network circuitIBM·Filed 2001·Granted Dec 28, 2004·27 cites·17 claims
- 1675US11750212B2Flexible hardware for high throughput vector dequantization with dynamic vector length and codebook sizeMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2021·Granted Sep 5, 2023·0 cites·19 claims
- 1775US11030131B2Data processing performance enhancement for neural networks using a virtualized data iteratorMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2020·Granted Jun 8, 2021·0 cites·20 claims
- 1875US10996739B2Reducing power consumption in a neural network environment using data managementMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted May 4, 2021·2 cites·21 claims
- 1974US12154027B2Increased precision neural processing elementMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2023·Granted Nov 26, 2024·0 cites·20 claims
- 2074US11176448B2Enhancing processing performance of a DNN module by bandwidth control of fabric interfaceMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2020·Granted Nov 16, 2021·0 cites·20 claims
- 2173US7509611B2Heuristic clustering of circuit elements in a circuit designIBM·Filed 2006·Granted Mar 24, 2009·5 cites·12 claims
- 2272US10528494B2Direct memory access (“DMA”) descriptor processing using identifiers assigned to descriptors on DMA enginesMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Jan 7, 2020·1 cites·7 claims
- 2372US7716423B2Pseudo LRU algorithm for hint-locking during software and hardware address translation cache miss handling modesIBM·Filed 2006·Granted May 11, 2010·5 cites·10 claims
- 2471US9146835B2Methods and systems with delayed execution of multiple processorsBELLOWS MARK D·Filed 2012·Granted Sep 29, 2015·4 cites·20 claims
- 2568US11487342B2Reducing power consumption in a neural network environment using data managementMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2021·Granted Nov 1, 2022·0 cites·20 claims
- 2668US7634591B2Method and apparatus for tracking command order dependenciesIBM·Filed 2006·Granted Dec 15, 2009·4 cites·5 claims
- 2766US9715464B2Direct memory access descriptor processingMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2015·Granted Jul 25, 2017·1 cites·6 claims
- 2866US6601122B1Exceptions and interrupts with dynamic priority and vector routingIBM·Filed 2000·Granted Jul 29, 2003·12 cites·7 claims
- 2965US11341399B2Reducing power consumption in a neural network processor by skipping processing operationsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2018·Granted May 24, 2022·0 cites·10 claims
- 3065US11205118B2Power-efficient deep neural network module configured for parallel kernel and parallel input processingMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2018·Granted Dec 21, 2021·0 cites·10 claims
- 3164US10963403B2Processing discontiguous memory as contiguous memory to improve performance of a neural network environmentMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Mar 30, 2021·0 cites·23 claims
- 3264US8327075B2Methods and apparatus for handling a cache missIRISH JOHN D·Filed 2005·Granted Dec 4, 2012·3 cites·12 claims
- 3363US7543204B2Method, apparatus and computer program product for designing logic scan chains for matching gated portions of a clock treeIBM·Filed 2005·Granted Jun 2, 2009·4 cites·14 claims
- 3463US7398505B2Automatic back annotation of a functional definition of an integrated circuit design based upon physical layoutIBM·Filed 2006·Granted Jul 8, 2008·2 cites·18 claims
- 3561US7917700B2Method and cache control circuit for replacing cache lines using alternate PLRU algorithm and victim cache coherency stateIBM·Filed 2007·Granted Mar 29, 2011·2 cites·16 claims
- 3661US2018300602A1Minimizing memory reads and increasing performance of a neural network environment using a directed line bufferMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Application pending·0 cites
- 3759US7472227B2Invalidating multiple address cache entriesIBM·Filed 2005·Granted Dec 30, 2008·1 cites·7 claims
- 3858US11604972B2Increased precision neural processing elementMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2019·Granted Mar 14, 2023·0 cites·18 claims
- 3958US10572401B2Direct memory access descriptor processing using timestampsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Feb 25, 2020·0 cites·19 claims
- 4058US8196074B2Heuristic clustering of circuit elements in a circuit designFREDRICKSON MARK S·Filed 2009·Granted Jun 5, 2012·2 cites·21 claims
- 4158US7539840B2Handling concurrent address translation cache misses and hits under those misses while maintaining command orderIBM·Filed 2006·Granted May 26, 2009·1 cites·6 claims
- 4258US7430699B2Trading propensity-based clustering of circuit elements in a circuit designIBM·Filed 2006·Granted Sep 30, 2008·2 cites·16 claims
- 4356US8127082B2Method and apparatus for allowing uninterrupted address translations while performing address translation cache invalidates and other cache operationsMCBRIDE CHAD B·Filed 2006·Granted Feb 28, 2012·2 cites·23 claims
- 4455US11507349B2Neural processing element with single instruction multiple data (SIMD) compute lanesMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2019·Granted Nov 22, 2022·0 cites·20 claims
- 4553US7149218B2Cache line cut through of limited life data in a data processing systemIBM·Filed 2001·Granted Dec 12, 2006·3 cites·19 claims
- 4653US2009187695A1Handling concurrent address translation cache misses and hits under those misses while maintaining command orderIBM·Filed 2009·Application pending·0 cites
- 4752US7330479B2Shared transmit buffer for network processor and methods for using sameIBM·Filed 2003·Granted Feb 12, 2008·1 cites·3 claims
- 4852US2008141210A1Automatic back annotation of a functional definition of an integrated circuit design based upon physical layoutIBM·Filed 2008·Application pending·0 cites
- 4952US2008112425A1Shared transmit buffer for network processor and methods for using sameIBM·Filed 2008·Application pending·0 cites
- 5050US9405315B2Delayed execution of program code on multiple processorsIBM·Filed 2015·Granted Aug 2, 2016·0 cites·20 claims
Showing the top 50 of 68 patent records by PatentIndex Score.
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