Inventor · disambiguated record
Yong Kong Siew
Also filed as: SIEW YONG KONG
19 granted patents·1 pending application·245 citations·filing 1999–2023
93Inventor score
Files withCHARTERED SEMICONDUCTOR MFG9SAMSUNG ELECTRONICS CO LTD8GLOBALFOUNDRIES SG PTE LTD1HO VINCENT1IMEC VZW1
Top patents by PatentIndex Score
20 records- 0193US7524755B2Entire encapsulation of Cu interconnects using self-aligned CuSiN filmCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Apr 28, 2009·37 cites·18 claims
- 0293US6406975B1Method for fabricating an air gap shallow trench isolation (STI) structureCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Jun 18, 2002·84 cites·18 claims
- 0393US6380106B1Method for fabricating an air gap metallization scheme that reduces inter-metal capacitance of interconnect structuresCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Apr 30, 2002·84 cites·11 claims
- 0492US10396034B2Semiconductor devices and methods of manufacturing semiconductor devicesSAMSUNG ELECTRONICS CO LTD·Filed 2017·Granted Aug 27, 2019·7 cites·15 claims
- 0581US12132001B2Semiconductor devices and methods of manufacturing semiconductor devicesSAMSUNG ELECTRONICS CO LTD·Filed 2023·Granted Oct 29, 2024·0 cites·19 claims
- 0678US9997402B2Method of manufacturing a wiring structure on a self-forming barrier patternSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Jun 12, 2018·3 cites·20 claims
- 0778US9793158B2Methods of fabricating a semiconductor deviceSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Oct 17, 2017·3 cites·20 claims
- 0876US11335637B2Semiconductor devices and methods of manufacturing semiconductor devicesSAMSUNG ELECTRONICS CO LTD·Filed 2019·Granted May 17, 2022·1 cites·16 claims
- 0974US11804438B2Semiconductor devices and methods of manufacturing semiconductor devicesSAMSUNG ELECTRONICS CO LTD·Filed 2022·Granted Oct 31, 2023·0 cites·19 claims
- 1074US9865594B2Semiconductor devicesSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Jan 9, 2018·2 cites·20 claims
- 1172US7993997B2Poly profile engineering to modulate spacer induced stress for device enhancementGLOBALFOUNDRIES SG PTE LTD·Filed 2007·Granted Aug 9, 2011·3 cites·24 claims
- 1271US7670946B2Methods to eliminate contact plug sidewall slitCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Mar 2, 2010·4 cites·29 claims
- 1366US7247555B2Method to control dual damascene trench etch profile and trench depth uniformityCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted Jul 24, 2007·13 cites·30 claims
- 1462US7833900B2Interconnections for integrated circuits including reducing an overburden and annealingCHARTERED SEMICONDUCTOR MFG·Filed 2008·Granted Nov 16, 2010·2 cites·37 claims
- 1559US10079147B2Method of forming interconnects for semiconductor devicesSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Sep 18, 2018·1 cites·17 claims
- 1656US11488826B2Self-aligned layer patterningIMEC VZW·Filed 2020·Granted Nov 1, 2022·0 cites·12 claims
- 1752US7947604B2Method for corrosion prevention during planarizationCHARTERED SEMICONDUCTOR MFG·Filed 2008·Granted May 24, 2011·0 cites·21 claims
- 1845US2009315115A1Implantation for shallow trench isolation (STI) formation and for stress for transistor performance enhancementCHARTERED SEMICONDUCTOR MFG·Filed 2008·Application pending·0 cites
- 1944US8519445B2Poly profile engineering to modulate spacer induced stress for device enhancementHO VINCENT·Filed 2011·Granted Aug 27, 2013·0 cites·20 claims
- 2030US6121135AModified buried contact process for IC device fabricationCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Sep 19, 2000·1 cites·21 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →