Inventor · disambiguated record
Lup San Leong
Also filed as: LEONG LUP S · LEONG LUP SAN
20 granted patents·5 pending applications·159 citations·filing 1999–2022
93Inventor score
Files withGLOBALFOUNDRIES SG PTE LTD11CHARTERED SEMICONDUCTOR MFG8RAO XUESONG2LEONG LUP SAN1LIU HUANG1
Top patents by PatentIndex Score
25 records- 0194US12284924B2Programmable interposer using RRAM platformGLOBALFOUNDRIES SG PTE LTD·Filed 2022·Granted Apr 22, 2025·2 cites·20 claims
- 0292US6730573B1MIM and metal resistor formation at CU beol using only one extra maskCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted May 4, 2004·96 cites·31 claims
- 0388US11289649B2Non-volatile memory elements with a narrowed electrodeGLOBALFOUNDRIES SG PTE LTD·Filed 2020·Granted Mar 29, 2022·2 cites·20 claims
- 0483US9287197B2Through silicon viasGLOBALFOUNDRIES SG PTE LTD·Filed 2013·Granted Mar 15, 2016·6 cites·20 claims
- 0577US9076735B2Methods for fabricating integrated circuits using chemical mechanical polishingGLOBALFOUNDRIES SG PTE LTD·Filed 2013·Granted Jul 7, 2015·5 cites·17 claims
- 0675US9437547B2Through silicon viasGLOBALFOUNDRIES SG PTE LTD·Filed 2016·Granted Sep 6, 2016·2 cites·20 claims
- 0774US10475990B2Pillar contact extension and method for producing the sameGLOBALFOUNDRIES SG PTE LTD·Filed 2018·Granted Nov 12, 2019·2 cites·17 claims
- 0869US8940637B2Method for forming through silicon via with wafer backside protectionLEONG LUP SAN·Filed 2012·Granted Jan 27, 2015·3 cites·11 claims
- 0962US7833900B2Interconnections for integrated circuits including reducing an overburden and annealingCHARTERED SEMICONDUCTOR MFG·Filed 2008·Granted Nov 16, 2010·2 cites·37 claims
- 1060US6376378B1Polishing apparatus and method for forming an integrated circuitCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Apr 23, 2002·21 cites·28 claims
- 1158US11744085B2Semiconductor devices and methods of forming semiconductor devices with logic and memory regions insulation layersGLOBALFOUNDRIES SG PTE LTD·Filed 2020·Granted Aug 29, 2023·0 cites·20 claims
- 1257US7156726B1Polishing apparatus and method for forming an integrated circuitCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Jan 2, 2007·6 cites·6 claims
- 1356US11641789B2Memory cells and methods for forming memory cellsGLOBALFOUNDRIES SG PTE LTD·Filed 2021·Granted May 2, 2023·0 cites·20 claims
- 1456US9230886B2Method for forming through silicon via with wafer backside protectionGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Granted Jan 5, 2016·0 cites·17 claims
- 1554US6964598B1Polishing apparatus and method for forming an integrated circuitCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Nov 15, 2005·4 cites·7 claims
- 1652US7947604B2Method for corrosion prevention during planarizationCHARTERED SEMICONDUCTOR MFG·Filed 2008·Granted May 24, 2011·0 cites·21 claims
- 1750US2010206818A1Ultrasonic filtration for cmp slurryCHARTERED SEMICONDUCTOR MFG·Filed 2009·Application pending·0 cites
- 1848US9202746B2Integrated circuits with improved gap fill dielectric and methods for fabricating sameGLOBALFOUNDRIES SG PTE LTD·Filed 2013·Granted Dec 1, 2015·0 cites·20 claims
- 1944US2016114457A1Uniform polishing with fixed abrasive padGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Application pending·0 cites
- 2041US6443809B1Polishing apparatus and method for forming an integrated circuitCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Sep 3, 2002·8 cites·20 claims
- 2140US8492236B1Step-like spacer profileRAO XUESONG·Filed 2012·Granted Jul 23, 2013·0 cites·20 claims
- 2237US2014117545A1Copper hillock prevention with hydrogen plasma treatment in a dedicated chamberLIU HUANG·Filed 2012·Application pending·0 cites
- 2336US8828858B2Spacer profile engineering using films with continuously increased etch rate from inner to outer surfaceRAO XUESONG·Filed 2012·Granted Sep 9, 2014·0 cites·11 claims
- 2435US2002164875A1Thermal mechanical planarization in integrated circuitsFiled 2001·Application pending·0 cites
- 2534US2005113002A1CMP polishing heads retaining ring groove design for microscratch reductionFiled 2003·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →