Inventor · disambiguated record
Manu Chopra
Also filed as: CHOPRA MANU
8 granted patents·53 citations·filing 2003–2020
83Inventor score
Technology areasG06F
Top patents by PatentIndex Score
8 records- 0184US10325042B1Debugging failures in X-propagation logic circuit simulationCADENCE DESIGN SYSTEMS INC·Filed 2016·Granted Jun 18, 2019·6 cites·8 claims
- 0280US7747971B1State retention for formal verificationCADENCE DESIGN SYSTEMS INC·Filed 2007·Granted Jun 29, 2010·14 cites·8 claims
- 0377US7047510B1Method and system for partitioning an integrated circuit designCADENCE DESIGN SYSTEMS INC·Filed 2003·Granted May 16, 2006·26 cites·26 claims
- 0465US8612905B1System method and apparatus for vacuity detectionGOYAL PRADEEP·Filed 2008·Granted Dec 17, 2013·4 cites·25 claims
- 0553US11429770B1System, method, and computer program product for analyzing X-propagation simulationsCADENCE DESIGN SYSTEMS INC·Filed 2020·Granted Aug 30, 2022·0 cites·20 claims
- 0650US8949754B1System, method, and computer program product for verification using X-propagationCADENCE DESIGN SYSTEMS INC·Filed 2013·Granted Feb 3, 2015·0 cites·20 claims
- 0750US7444274B1Method and system for verifying circuit designs through propagation of assertionsCADENCE DESIGN SYSTEMS INC·Filed 2003·Granted Oct 28, 2008·3 cites·53 claims
- 0842US10162920B1System and method for performing out of order name resolution in an electronic designCADENCE DESIGN SYSTEMS INC·Filed 2016·Granted Dec 25, 2018·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →