Inventor · disambiguated record
Alireza S. Kaviani
Also filed as: KAVIANI ALIREZA · KAVIANI ALIREZA S
42 granted patents·1 pending application·854 citations·filing 1996–2024
98Inventor score
Top patents by PatentIndex Score
43 records- 0198US8294490B1Integrated circuit and method of asynchronously routing data in an integrated circuitKAVIANI ALIREZA S·Filed 2010·Granted Oct 23, 2012·68 cites·20 claims
- 0297US6140839AComputational field programmable architectureFiled 1998·Granted Oct 31, 2000·272 cites·17 claims
- 0395US11496418B1Packet-based and time-multiplexed network-on-chipXILINX INC·Filed 2020·Granted Nov 8, 2022·11 cites·20 claims
- 0493USRE49163EActive-by-active programmable deviceXILINX INC·Filed 2020·Granted Aug 9, 2022·3 cites·22 claims
- 0592US7071751B1Counter-controlled delay lineXILINX INC·Filed 2004·Granted Jul 4, 2006·43 cites·36 claims
- 0692US6556042B1FPGA with improved structure for implementing large multiplexersXILINX INC·Filed 2002·Granted Apr 29, 2003·37 cites·10 claims
- 0791US8913601B1Programmable integrated circuit and method of asynchronously routing data in a circuit block of an integrated circuitKAVIANI ALIREZA S·Filed 2010·Granted Dec 16, 2014·12 cites·20 claims
- 0890US8358148B1Programmable integrated circuit and method of asynchronously routing data in an integrated circuitXILINX INC·Filed 2010·Granted Jan 22, 2013·10 cites·14 claims
- 0990US7453297B1Method of and circuit for deskewing clock signals in an integrated circuitXILINX INC·Filed 2005·Granted Nov 18, 2008·23 cites·17 claims
- 1089US9875330B2Folding duplicate instances of modules in a circuit designXILINX INC·Filed 2015·Granted Jan 23, 2018·7 cites·20 claims
- 1189US8831064B1Method of and circuit for generating a spread spectrum clock signalKAVIANI ALIREZA S·Filed 2007·Granted Sep 9, 2014·17 cites·18 claims
- 1287US7479814B1Circuit for digital frequency synthesis in an integrated circuitXILINX INC·Filed 2005·Granted Jan 20, 2009·18 cites·20 claims
- 1385US6466052B1Implementing wide multiplexers in an FPGA using a horizontal chain structureXILINX INC·Filed 2001·Granted Oct 15, 2002·31 cites·20 claims
- 1482US10002100B2Active-by-active programmable deviceXILINX INC·Filed 2016·Granted Jun 19, 2018·3 cites·19 claims
- 1582US6873183B1Method and circuit for glitchless clock controlXILINX INC·Filed 2003·Granted Mar 29, 2005·31 cites·19 claims
- 1681US10042806B2System-level interconnect ring for a programmable integrated circuitXILINX INC·Filed 2016·Granted Aug 7, 2018·3 cites·20 claims
- 1781US6914449B2Structure for reducing leakage current in submicron IC devicesXILINX INC·Filed 2001·Granted Jul 5, 2005·23 cites·12 claims
- 1880US7236026B1Circuit for and method of generating a frequency aligned clock signalXILINX INC·Filed 2005·Granted Jun 26, 2007·12 cites·18 claims
- 1978US6480023B1Configurable logic block for PLDXILINX INC·Filed 2000·Granted Nov 12, 2002·19 cites·16 claims
- 2077US10498567B1Die-to-die communications schemeXILINX INC·Filed 2018·Granted Dec 3, 2019·2 cites·20 claims
- 2176US7453301B1Method of and circuit for phase shifting a clock signalXILINX INC·Filed 2005·Granted Nov 18, 2008·8 cites·17 claims
- 2276US6603332B2Configurable logic block for PLD with logic gate for combining output with another configurable logic blockXILINX INC·Filed 2001·Granted Aug 5, 2003·17 cites·16 claims
- 2374US6756822B1Phase detector employing asynchronous level-mode sequential circuitryXILINX INC·Filed 2002·Granted Jun 29, 2004·13 cites·15 claims
- 2473USRE50370EActive-by-active programmable deviceXILINX INC·Filed 2022·Granted Apr 8, 2025·0 cites·41 claims
- 2572US9602108B1Lut cascading circuitXILINX INC·Filed 2015·Granted Mar 21, 2017·2 cites·18 claims
- 2671US7477112B1Structure for the main oscillator of a counter-controlled delay lineXILINX INC·Filed 2006·Granted Jan 13, 2009·8 cites·17 claims
- 2769US6838919B1DCVSL pulse width controller and systemXILINX INC·Filed 2004·Granted Jan 4, 2005·16 cites·24 claims
- 2869US6788124B1Method and apparatus for reducing jitter in a delay line and a trim unitXILINX INC·Filed 2002·Granted Sep 7, 2004·14 cites·27 claims
- 2968US7190196B1Dual-edge synchronized data samplerXILINX INC·Filed 2004·Granted Mar 13, 2007·11 cites·18 claims
- 3068US6838918B1Hard phase alignment of clock signals using asynchronous level-mode state machineXILINX INC·Filed 2002·Granted Jan 4, 2005·13 cites·12 claims
- 3166US6847246B1Method and apparatus for reducing jitter and power dissipation in a delay lineXILINX INC·Filed 2002·Granted Jan 25, 2005·13 cites·23 claims
- 3265US6754686B1Literal sharing method for fast sum-of-products logicXILINX INC·Filed 2000·Granted Jun 22, 2004·9 cites·6 claims
- 3361US8938700B1Data-driven pattern matching in synthesis of circuit designsXILINX INC·Filed 2013·Granted Jan 20, 2015·1 cites·20 claims
- 3461US6978427B1Literal sharing method for fast sum-of-products logicXILINX INC·Filed 2004·Granted Dec 20, 2005·6 cites·13 claims
- 3561US6943597B1Hard phase alignment of clock signals with an oscillator controllerXILINX INC·Filed 2004·Granted Sep 13, 2005·9 cites·21 claims
- 3657US7190756B1Hybrid counter with an asynchronous front endXILINX INC·Filed 2004·Granted Mar 13, 2007·10 cites·20 claims
- 3756US6806732B1FPGA with improved structure for implementing large multiplexersXILINX INC·Filed 2003·Granted Oct 19, 2004·5 cites·8 claims
- 3856US6212670B1Method for implementing a programmable logic device having look-up table and product-term circuitryAGILENT TECHNOLOGIES INC·Filed 1998·Granted Apr 3, 2001·26 cites·31 claims
- 3956US2024281377A1Embedded configurable engineXILINX INC·Filed 2024·Application pending·0 cites
- 4053US11803681B1Wafer-scale large programmable deviceXILINX INC·Filed 2021·Granted Oct 31, 2023·0 cites·20 claims
- 4153US6784692B1FPGA with improved structure for implementing large multiplexersXILINX INC·Filed 2003·Granted Aug 31, 2004·4 cites·12 claims
- 4253US5841295AHybrid programmable logic deviceHEWLETT PACKARD CO·Filed 1996·Granted Nov 24, 1998·23 cites·26 claims
- 4345US8788553B1Method and circuit for providing digital frequency synthesisLEE TED·Filed 2009·Granted Jul 22, 2014·1 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →