Inventor · disambiguated record
Joseph Delgross
Also filed as: DELGROSS JOSEPH · DELGROSS JOSEPH ANTHONY
14 granted patents·290 citations·filing 2008–2019
93Inventor score
Technology areasG06F
Top patents by PatentIndex Score
14 records- 0197US9223709B1Thread-aware cache memory managementMARVELL INT LTD·Filed 2013·Granted Dec 29, 2015·49 cites·21 claims
- 0295US9026769B1Detecting and reissuing of loop instructions in reorder structureJAMIL SUJAT·Filed 2012·Granted May 5, 2015·43 cites·20 claims
- 0395US8990505B1Cache memory bank selectionJAMIL SUJAT·Filed 2008·Granted Mar 24, 2015·58 cites·34 claims
- 0492US9058272B1Method and apparatus having a snoop filter decoupled from an associated cache and a buffer for replacement line addressesMARVELL INT LTD·Filed 2013·Granted Jun 16, 2015·26 cites·17 claims
- 0590US8943273B1Method and apparatus for improving cache efficiencyJAMIL SUJAT·Filed 2009·Granted Jan 27, 2015·31 cites·20 claims
- 0688US10275249B1Method and apparatus for predicting end of loopMARVELL INT LTD·Filed 2016·Granted Apr 30, 2019·12 cites·20 claims
- 0788US8458404B1Programmable cache access protocol to optimize power consumption and performanceDELGROSS JOSEPH·Filed 2009·Granted Jun 4, 2013·24 cites·20 claims
- 0887US8135916B1Method and apparatus for hardware-configurable multi-policy coherence protocolO'BLENESS R FRANK·Filed 2009·Granted Mar 13, 2012·19 cites·11 claims
- 0986US9606800B1Method and apparatus for sharing instruction scheduling resources among a plurality of execution threads in a multi-threaded processor architectureMARVELL INT LTD·Filed 2013·Granted Mar 28, 2017·9 cites·20 claims
- 1081US9442735B1Method and apparatus for processing speculative, out-of-order memory access instructionsMARVELL INT LTD·Filed 2013·Granted Sep 13, 2016·6 cites·20 claims
- 1181US8631206B1Way-selecting translation lookaside bufferO'BLENESS R FRANK·Filed 2008·Granted Jan 14, 2014·11 cites·11 claims
- 1276US10901865B2Error detection for processing elements redundantly processing a same processing workloadADVANCED RISC MACH LTD·Filed 2019·Granted Jan 26, 2021·2 cites·19 claims
- 1355US8769204B1Programmable cache access protocol to optimize power consumption and performanceMARVELL INT LTD·Filed 2013·Granted Jul 1, 2014·0 cites·20 claims
- 1450US9892051B1Method and apparatus for use of a preload instruction to improve efficiency of cacheMARVELL INT LTD·Filed 2015·Granted Feb 13, 2018·0 cites·23 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →