Inventor · disambiguated record
Romain Lallement
Also filed as: LALLEMENT ROMAIN · LALLEMENT ROMAIN J
10 granted patents·3 pending applications·23 citations·filing 2017–2023
83Inventor score
Top patents by PatentIndex Score
13 records- 0195US10276452B1Low undercut N-P work function metal patterning in nanosheet replacement metal gate processIBM·Filed 2018·Granted Apr 30, 2019·13 cites·14 claims
- 0289US10475904B2Methods of forming merged source/drain regions on integrated circuit productsGLOBALFOUNDRIES INC·Filed 2018·Granted Nov 12, 2019·5 cites·19 claims
- 0381US10629495B2Low undercut N-P work function metal patterning in nanosheet replacement metal gate processIBM·Filed 2019·Granted Apr 21, 2020·2 cites·20 claims
- 0480US10903124B2Transistor structure with n/p boundary bufferIBM·Filed 2019·Granted Jan 26, 2021·2 cites·13 claims
- 0572US10514605B2Resist multilayer film-attached substrate and patterning processSHINETSU CHEMICAL CO·Filed 2018·Granted Dec 24, 2019·1 cites·20 claims
- 0662US11569132B2Transistor structure with N/P boundary bufferIBM·Filed 2020·Granted Jan 31, 2023·0 cites·7 claims
- 0762US2024319579A1Optimal scanner maps and field layoutsIBM·Filed 2023·Application pending·0 cites
- 0857US2023280644A1Method of making euv mask with an absorber layerIBM·Filed 2022·Application pending·0 cites
- 0949US10354922B1Simplified block patterning with wet strippable hardmask for high-energy implantationIBM·Filed 2017·Granted Jul 16, 2019·0 cites·19 claims
- 1048US11177132B2Self aligned block masks for implantation controlIBM·Filed 2019·Granted Nov 16, 2021·0 cites·15 claims
- 1145US10642950B2Verifying planarization performance using electrical measuresIBM·Filed 2018·Granted May 5, 2020·0 cites·16 claims
- 1240US10832919B2Measuring and modeling material planarization performanceIBM·Filed 2018·Granted Nov 10, 2020·0 cites·18 claims
- 1339US2020118828A1Planarization depth triggered by process interactionIBM·Filed 2018·Application pending·0 cites
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