Inventor · disambiguated record
Thomas Stephen Chanak, Jr.
Also filed as: CHANAK JR THOMAS STEPHEN
2 granted patents·9 citations·filing 2007–2011
56Inventor score
Technology areasG06F
Top patents by PatentIndex Score
2 records- 0169US8291364B2Automated digital circuit design tool that reduces or eliminates adverse timing constraints do to an inherent clock signal skew, and applications thereofPANIGRAHI AVISHEK·Filed 2011·Granted Oct 16, 2012·5 cites·7 claims
- 0265US7917882B2Automated digital circuit design tool that reduces or eliminates adverse timing constraints due to an inherent clock signal skew, and applications thereofMIPS TECH INC·Filed 2007·Granted Mar 29, 2011·4 cites·25 claims
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