Inventor · disambiguated record
Daxin Mao
Also filed as: MAO DAXIN
21 granted patents·8 pending applications·1,128 citations·filing 2003–2018
97Inventor score
Files withSANDISK TECHNOLOGIES LLC9SANDISK TECHNOLOGIES INC8APPLIED MATERIALS INC5MAO DAXIN2DAVID JEFFREY DRUE1
Top patents by PatentIndex Score
29 records- 0199US9728551B1Multi-tier replacement memory stack structure integration schemeSANDISK TECHNOLOGIES INC·Filed 2016·Granted Aug 8, 2017·78 cites·36 claims
- 0299US9673213B1Three dimensional memory device with peripheral devices under dummy dielectric layer stack and method of making thereofSANDISK TECHNOLOGIES INC·Filed 2016·Granted Jun 6, 2017·77 cites·23 claims
- 0398US10269620B2Multi-tier memory device with through-stack peripheral contact via structures and method of making thereofSANDISK TECHNOLOGIES LLC·Filed 2016·Granted Apr 23, 2019·34 cites·15 claims
- 0498US10249640B2Within-array through-memory-level via structures and method of making thereofSANDISK TECHNOLOGIES LLC·Filed 2016·Granted Apr 2, 2019·52 cites·27 claims
- 0598US10056399B2Three-dimensional memory devices containing inter-tier dummy memory cells and methods of making the sameSANDISK TECHNOLOGIES LLC·Filed 2017·Granted Aug 21, 2018·24 cites·20 claims
- 0698US10008570B2Bulb-shaped memory stack structures for direct source contact in three-dimensional memory deviceSANDISK TECHNOLOGIES LLC·Filed 2017·Granted Jun 26, 2018·62 cites·16 claims
- 0798US9853043B2Method of making a multilevel memory stack structure using a cavity containing a sacrificial fill materialSANDISK TECHNOLOGIES INC·Filed 2015·Granted Dec 26, 2017·49 cites·17 claims
- 0898US9679906B2Three-dimensional memory devices containing memory block bridgesSANDISK TECHNOLOGIES INC·Filed 2015·Granted Jun 13, 2017·35 cites·18 claims
- 0998US9543318B1Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistorsSANDISK TECHNOLOGIES INC·Filed 2015·Granted Jan 10, 2017·80 cites·18 claims
- 1098US9449987B1Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistorsSANDISK TECHNOLOGIES INC·Filed 2016·Granted Sep 20, 2016·454 cites·28 claims
- 1197US10256248B2Through-memory-level via structures between staircase regions in a three-dimensional memory device and method of making thereofSANDISK TECHNOLOGIES LLC·Filed 2016·Granted Apr 9, 2019·42 cites·25 claims
- 1296US10217746B1Three-dimensional memory device having L-shaped word lines and a support structure and methods of making the sameSANDISK TECHNOLOGIES LLC·Filed 2018·Granted Feb 26, 2019·32 cites·12 claims
- 1396US10115732B2Three dimensional memory device containing discrete silicon nitride charge storage regionsSANDISK TECHNOLOGIES INC·Filed 2016·Granted Oct 30, 2018·33 cites·17 claims
- 1496US9985046B2Method of forming a staircase in a semiconductor device using a linear alignment control featureSANDISK TECHNOLOGIES LLC·Filed 2016·Granted May 29, 2018·17 cites·9 claims
- 1595US10354956B1Three-dimensional memory device containing hydrogen diffusion barrier structures for CMOS under array architecture and method of making the sameSANDISK TECHNOLOGIES LLC·Filed 2018·Granted Jul 16, 2019·13 cites·12 claims
- 1694US9859363B2Self-aligned isolation dielectric structures for a three-dimensional memory deviceSANDISK TECHNOLOGIES LLC·Filed 2016·Granted Jan 2, 2018·15 cites·31 claims
- 1790US9716101B2Forming 3D memory cells after word line replacementSANDISK TECHNOLOGIES INC·Filed 2015·Granted Jul 25, 2017·8 cites·11 claims
- 1883US7582564B2Process and composition for conductive material removal by electrochemical mechanical polishingAPPLIED MATERIALS INC·Filed 2005·Granted Sep 1, 2009·9 cites·20 claims
- 1982US7210988B2Method and apparatus for reduced wear polishing pad conditioningAPPLIED MATERIALS INC·Filed 2005·Granted May 1, 2007·9 cites·35 claims
- 2070US8337279B2Closed-loop control for effective pad conditioningDHANDAPANI SIVAKUMAR·Filed 2009·Granted Dec 25, 2012·4 cites·20 claims
- 2163US7879255B2Method and composition for electrochemically polishing a conductive material on a substrateAPPLIED MATERIALS INC·Filed 2006·Granted Feb 1, 2011·1 cites·2 claims
- 2260US2006266655A1Multiple chemistry electrochemical plating methodSUN ZHI-WEN·Filed 2006·Application pending·0 cites
- 2350US2004154926A1Multiple chemistry electrochemical plating methodFiled 2003·Application pending·0 cites
- 2446US2008138988A1Detection of clearance of polysilicon residueDAVID JEFFREY DRUE·Filed 2007·Application pending·0 cites
- 2546US2006249394A1Process and composition for electrochemical mechanical polishingAPPLIED MATERIALS INC·Filed 2005·Application pending·0 cites
- 2643US2005077188A1Endpoint for electrochemical processingAPPLIED MATERIALS INC·Filed 2004·Application pending·0 cites
- 2743US2007254485A1Abrasive composition for electrochemical mechanical polishingMAO DAXIN·Filed 2007·Application pending·0 cites
- 2839US2006169674A1Method and composition for polishing a substrateMAO DAXIN·Filed 2006·Application pending·0 cites
- 2938US2006196778A1Tungsten electroprocessingJIA RENHE·Filed 2006·Application pending·0 cites
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