Inventor · disambiguated record
Chorng-Lii Hwang
Also filed as: HWANG CHORNG-LII
13 granted patents·1 pending application·167 citations·filing 1995–2005
93Inventor score
Top patents by PatentIndex Score
14 records- 0191US7203794B2Destructive-read random access memory system buffered with destructive-read memory cacheIBM·Filed 2005·Granted Apr 10, 2007·21 cites·14 claims
- 0273US6674676B1Column redundancy system and method for a micro-cell embedded DRAM (e-DRAM) architectureIBM·Filed 2003·Granted Jan 6, 2004·17 cites·10 claims
- 0372US5898706AStructure and method for reliability stressing of dielectricsIBM·Filed 1997·Granted Apr 27, 1999·34 cites·20 claims
- 0469US6801980B2Destructive-read random access memory system buffered with destructive-read memory cacheIBM·Filed 2002·Granted Oct 5, 2004·13 cites·12 claims
- 0568US6948028B2Destructive-read random access memory system buffered with destructive-read memory cacheIBM·Filed 2004·Granted Sep 20, 2005·10 cites·2 claims
- 0656US6621294B2Pad system for an integrated circuit or deviceIBM·Filed 2002·Granted Sep 16, 2003·7 cites·13 claims
- 0755US5587614AMicroplanarization of rough electrodes by thin amorphous layersTEXAS INSTRUMENTS INC·Filed 1995·Granted Dec 24, 1996·21 cites·7 claims
- 0854US7057866B2System and method for disconnecting a portion of an integrated circuitIBM·Filed 2001·Granted Jun 6, 2006·8 cites·15 claims
- 0951US6674673B1Column redundancy system and method for a micro-cell embedded DRAM (e-DRAM) architectureIBM·Filed 2002·Granted Jan 6, 2004·6 cites·10 claims
- 1050US6404689B1Method and structure for hiding a refresh operation in a DRAM having an interlocked pipelineIBM·Filed 2001·Granted Jun 11, 2002·6 cites·29 claims
- 1147US6445611B1Method and arrangement for preconditioning in a destructive read memoryIBM·Filed 2001·Granted Sep 3, 2002·5 cites·17 claims
- 1242US6238963B1Damascene process for forming ferroelectric capacitorsIBM·Filed 1999·Granted May 29, 2001·9 cites·8 claims
- 1342US2003009721A1Method and system for background ECC scrubbing for a memory arrayIBM·Filed 2001·Application pending·0 cites
- 1441US6440638B2Method and apparatus for resist planarizationIBM·Filed 1998·Granted Aug 27, 2002·10 cites·13 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →