Inventor · disambiguated record
Chung-Jen Chien
Also filed as: CHIEN CHUNG-JEN
8 granted patents·1 pending application·232 citations·filing 1995–2011
89Inventor score
Top patents by PatentIndex Score
9 records- 0188US5793088AStructure for controlling threshold voltage of MOSFETINTEGRATED DEVICE TECH·Filed 1996·Granted Aug 11, 1998·98 cites·21 claims
- 0284US5888861AMethod of manufacturing a BiCMOS integrated circuit fully integrated within a CMOS process flowINTEGRATED DEVICE TECH·Filed 1997·Granted Mar 30, 1999·61 cites·29 claims
- 0365US5654213AMethod for fabricating a CMOS deviceINTEGRATED DEVICE TECH·Filed 1995·Granted Aug 5, 1997·26 cites·39 claims
- 0462US6201725B1Nonvolatile memory cell structure for integration with semiconductor logic devices and method of using sameOKI SEMICONDUCTOR·Filed 2000·Granted Mar 13, 2001·12 cites·3 claims
- 0552US6215701B1Nonvolatile memory cell structure for integration with semiconductor logic devices and method of using sameOKI SEMICONDUCTOR·Filed 1998·Granted Apr 10, 2001·13 cites·14 claims
- 0652US2012017989A1Metal and metal oxide surface texturingCHANG PAI-CHUN·Filed 2011·Application pending·0 cites
- 0748US6127710ACMOS structure having a gate without spacersINTEGRATED DEVICE TECH·Filed 1997·Granted Oct 3, 2000·11 cites·10 claims
- 0846US5750424AMethod for fabricating a CMOS deviceINTEGRATED DEVICE TECH·Filed 1996·Granted May 12, 1998·10 cites·17 claims
- 0928US6097048ADynamic random access memory cell suitable for integration with semiconductor logic devicesOKI SEMICONDUCTOR·Filed 1998·Granted Aug 1, 2000·1 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →