Inventor · disambiguated record
Mark A. Anders
Also filed as: ANDERS MARK · ANDERS MARK A
61 granted patents·17 pending applications·608 citations·filing 1998–2025
98Inventor score
Top patents by PatentIndex Score
78 records- 0199US11360767B2Instructions and logic to perform floating point and integer operations for machine learningINTEL CORP·Filed 2021·Granted Jun 14, 2022·39 cites·25 claims
- 0299US11169799B2Instructions and logic to perform floating-point and integer operations for machine learningINTEL CORP·Filed 2019·Granted Nov 9, 2021·36 cites·20 claims
- 0399US11080046B2Instructions and logic to perform floating point and integer operations for machine learningINTEL CORP·Filed 2021·Granted Aug 3, 2021·38 cites·30 claims
- 0499US10474458B2Instructions and logic to perform floating-point and integer operations for machine learningINTEL CORP·Filed 2017·Granted Nov 12, 2019·46 cites·20 claims
- 0599US10353706B2Instructions and logic to perform floating-point and integer operations for machine learningINTEL CORP·Filed 2017·Granted Jul 16, 2019·47 cites·20 claims
- 0696US9104474B2Variable precision floating point multiply-add circuitINTEL CORP·Filed 2012·Granted Aug 11, 2015·75 cites·27 claims
- 0792US12141578B2Instructions and logic to perform floating point and integer operations for machine learningINTEL CORP·Filed 2020·Granted Nov 12, 2024·2 cites·28 claims
- 0891US8284766B2Multi-core processor and method of communicating across a dieANDERS MARK·Filed 2007·Granted Oct 9, 2012·24 cites·20 claims
- 0990US9652425B2Method, apparatus and system for a source-synchronous circuit-switched network on a chip (NOC)INTEL CORP·Filed 2013·Granted May 16, 2017·13 cites·7 claims
- 1089US7509368B2Sparse tree adder circuitINTEL CORP·Filed 2005·Granted Mar 24, 2009·32 cites·21 claims
- 1189US7352209B2Voltage-level converterINTEL CORP·Filed 2006·Granted Apr 1, 2008·15 cites·19 claims
- 1289US6628143B2Full-swing source-follower leakage tolerant dynamic logicINTEL CORP·Filed 2001·Granted Sep 30, 2003·36 cites·4 claims
- 1388US2025094170A1Instructions and logic to perform floating point and integer operations for machine learningINTEL CORP·Filed 2024·Application pending·0 cites
- 1487US10599429B2Variable format, variable sparsity matrix multiplication instructionINTEL CORP·Filed 2018·Granted Mar 24, 2020·4 cites·25 claims
- 1586US12217053B2Instructions and logic to perform floating point and integer operations for machine learningINTEL CORP·Filed 2023·Granted Feb 4, 2025·0 cites·25 claims
- 1686US9680765B2Spatially divided circuit-switched channels for a network-on-chipINTEL CORP·Filed 2014·Granted Jun 13, 2017·9 cites·20 claims
- 1784US7519646B2Reconfigurable SIMD vector processing systemINTEL CORP·Filed 2006·Granted Apr 14, 2009·13 cites·16 claims
- 1881US12039331B2Instructions and logic to perform floating point and integer operations for machine learningINTEL CORP·Filed 2022·Granted Jul 16, 2024·0 cites·25 claims
- 1981US9979668B2Combined guaranteed throughput and best effort network-on-chipINTEL CORP·Filed 2014·Granted May 22, 2018·7 cites·19 claims
- 2080US11720355B2Instructions and logic to perform floating point and integer operations for machine learningINTEL CORP·Filed 2022·Granted Aug 8, 2023·0 cites·25 claims
- 2177US10944402B1Reconfigurable interconnect structure in integrated circuitsINTEL CORP·Filed 2020·Granted Mar 9, 2021·1 cites·21 claims
- 2277US6909127B2Low loss interconnect structure for use in microelectronic circuitsINTEL CORP·Filed 2001·Granted Jun 21, 2005·21 cites·28 claims
- 2376US10642614B2Reconfigurable multi-precision integer dot-product hardware accelerator for machine-learning applicationsINTEL CORP·Filed 2018·Granted May 5, 2020·3 cites·20 claims
- 2476US9843441B2Compact, low power advanced encryption standard circuitINTEL CORP·Filed 2013·Granted Dec 12, 2017·4 cites·14 claims
- 2576US2024232115A1High bandwidth core to network-on-chip interfaceINTEL CORP·Filed 2023·Application pending·0 cites
- 2675US9866476B2Parallel direction decode circuits for network-on-chipINTEL CORP·Filed 2014·Granted Jan 9, 2018·3 cites·20 claims
- 2775US9787571B2Link delay based routing apparatus for a network-on-chipINTEL CORP·Filed 2014·Granted Oct 10, 2017·3 cites·20 claims
- 2875US9626334B2Systems, apparatuses, and methods for K nearest neighbor searchINTEL CORP·Filed 2014·Granted Apr 18, 2017·3 cites·17 claims
- 2975US7154300B2Encoder and decoder circuits for dynamic busINTEL CORP·Filed 2003·Granted Dec 26, 2006·19 cites·31 claims
- 3075US2025165424A1High bandwidth core to network-on-chip interfaceINTEL CORP·Filed 2025·Application pending·0 cites
- 3174US7352059B2Low loss interconnect structure for use in microelectronic circuitsINTEL CORP·Filed 2005·Granted Apr 1, 2008·5 cites·18 claims
- 3273US11868296B2High bandwidth core to network-on-chip interfaceINTEL CORP·Filed 2022·Granted Jan 9, 2024·0 cites·17 claims
- 3373US6522186B2Hierarchical clock grid for on-die salphasic clockingINTEL CORP·Filed 2001·Granted Feb 18, 2003·18 cites·27 claims
- 3471US6351150B1Low switching activity dynamic driver for high performance interconnectsINTEL CORP·Filed 2000·Granted Feb 26, 2002·15 cites·21 claims
- 3569US9699096B2Priority-based routingSATPATHY SUDHIR·Filed 2013·Granted Jul 4, 2017·3 cites·7 claims
- 3669US9634866B2Architecture and method for hybrid circuit-switched and packet-switched routerANDERS MARK A·Filed 2013·Granted Apr 25, 2017·4 cites·22 claims
- 3769US6225826B1Single ended domino compatible dual function generator circuitsINTEL CORP·Filed 1998·Granted May 1, 2001·22 cites·21 claims
- 3868US9473296B2Instruction and logic for a simon block cipherMATHEW SANU K·Filed 2014·Granted Oct 18, 2016·2 cites·17 claims
- 3968US7380099B2Apparatus and method for an address generation circuitINTEL CORP·Filed 2004·Granted May 27, 2008·13 cites·30 claims
- 4068US2025377861A1Energy-efficient pre-encoded booth for stationary weights and activationsINTEL CORP·Filed 2025·Application pending·0 cites
- 4164US9992042B2Pipelined hybrid packet/circuit-switched network-on-chipINTEL CORP·Filed 2014·Granted Jun 5, 2018·1 cites·19 claims
- 4262US9961019B2Adaptively switched network-on-chipINTEL CORP·Filed 2014·Granted May 1, 2018·1 cites·22 claims
- 4361US7161992B2Transition encoded dynamic bus circuitINTEL CORP·Filed 2001·Granted Jan 9, 2007·6 cites·20 claims
- 4460US2020334038A1Variable format, variable sparsity matrix multiplication instructionINTEL CORP·Filed 2020·Application pending·0 cites
- 4559US11321263B2High bandwidth core to network-on-chip interfaceINTEL CORP·Filed 2014·Granted May 3, 2022·0 cites·9 claims
- 4658US7325024B2Adder circuit with sense-amplifier multiplexer front-endINTEL CORP·Filed 2003·Granted Jan 29, 2008·6 cites·26 claims
- 4757US6614279B2Clock receiver circuit for on-die salphasic clockingINTEL CORP·Filed 2001·Granted Sep 2, 2003·4 cites·20 claims
- 4854US10440377B2Motion estimation for video processingINTEL CORP·Filed 2012·Granted Oct 8, 2019·0 cites·25 claims
- 4954US9940236B2Pointer chasing across distributed memoryINTEL CORP·Filed 2014·Granted Apr 10, 2018·0 cites·20 claims
- 5054US2022188075A1Floating point multiply-accumulate unit for deep learningINTEL CORP·Filed 2022·Application pending·0 cites
Showing the top 50 of 78 patent records by PatentIndex Score.
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