Inventor · disambiguated record
William E. Burky
Also filed as: BURKY WILLIAM · BURKY WILLIAM E · BURKY WILLIAM ELTON
39 granted patents·12 pending applications·933 citations·filing 1993–2024
98Inventor score
Files withIBM34ADVANCED RISC MACH LTD6ABERNATHY CHRISTOPHER M4ABERNATHY CHRISTOPHER MICHAEL1ASTEC IND1
Top patents by PatentIndex Score
51 records- 0197US8108655B2Selecting fixed-point instructions to issue on load-store unitABERNATHY CHRISTOPHER MICHAEL·Filed 2009·Granted Jan 31, 2012·148 cites·20 claims
- 0297US7711929B2Method and system for tracking instruction dependency in an out-of-order processorIBM·Filed 2007·Granted May 4, 2010·75 cites·19 claims
- 0395US8041928B2Information handling system with real and virtual load/store instruction issue queueIBM·Filed 2008·Granted Oct 18, 2011·46 cites·20 claims
- 0493US7155600B2Method and logical apparatus for switching between single-threaded and multi-threaded execution states in a simultaneous multi-threaded (SMT) processorIBM·Filed 2003·Granted Dec 26, 2006·86 cites·16 claims
- 0592US8103852B2Information handling system including a processor with a bifurcated issue queueBISHOP JAMES WILSON·Filed 2008·Granted Jan 24, 2012·34 cites·14 claims
- 0692US7290261B2Method and logical apparatus for rename register reallocation in a simultaneous multi-threaded (SMT) processorIBM·Filed 2003·Granted Oct 30, 2007·98 cites·19 claims
- 0789US7669038B2Method and apparatus for back to back issue of dependent instructions in an out of order issue queueIBM·Filed 2008·Granted Feb 23, 2010·18 cites·10 claims
- 0888US7506139B2Method and apparatus for register renaming using multiple physical register files and avoiding associative searchIBM·Filed 2006·Granted Mar 17, 2009·17 cites·1 claims
- 0987US7472258B2Dynamically shared group completion table between multiple threadsIBM·Filed 2003·Granted Dec 30, 2008·45 cites·12 claims
- 1085US9489207B2Processor and method for partially flushing a dispatched instruction group including a mispredicted branchBURKY WILLIAM E·Filed 2009·Granted Nov 8, 2016·20 cites·16 claims
- 1178US7991979B2Issuing load-dependent instructions in an issue queue in a processing unit of a data processing systemIBM·Filed 2008·Granted Aug 2, 2011·9 cites·8 claims
- 1278US7769986B2Method and apparatus for register renamingIBM·Filed 2007·Granted Aug 3, 2010·8 cites·16 claims
- 1377US7015718B2Register file apparatus and method for computing flush masks in a multi-threaded processing systemIBM·Filed 2003·Granted Mar 21, 2006·19 cites·6 claims
- 1474US5502732AMethod for testing ECC logicIBM·Filed 1993·Granted Mar 26, 1996·71 cites·16 claims
- 1573US7660971B2Method and system for dependency tracking and flush recovery for an out-of-order microprocessorIBM·Filed 2007·Granted Feb 9, 2010·6 cites·15 claims
- 1671US7266675B2Processor including a register file and method for computing flush masks in a multi-threaded processing systemIBM·Filed 2006·Granted Sep 4, 2007·4 cites·14 claims
- 1771US7010750B2Method, program product, and processing system for performing object editing through implicit object selectionIBM·Filed 2001·Granted Mar 7, 2006·17 cites·16 claims
- 1869US7469407B2Method for resource balancing using dispatch flush in a simultaneous multithread processorIBM·Filed 2003·Granted Dec 23, 2008·13 cites·5 claims
- 1968US7194603B2SMT flush arbitrationIBM·Filed 2003·Granted Mar 20, 2007·13 cites·9 claims
- 2067US7380104B2Method and apparatus for back to back issue of dependent instructions in an out of order issue queueIBM·Filed 2006·Granted May 27, 2008·3 cites·10 claims
- 2166US8099582B2Tracking deallocated load instructions using a dependence matrixABERNATHY CHRISTOPHER M·Filed 2009·Granted Jan 17, 2012·3 cites·20 claims
- 2266US8033345B1Apparatus and method for a drilling assemblyASTEC IND·Filed 2007·Granted Oct 11, 2011·13 cites·21 claims
- 2366US7213135B2Method using a dispatch flush in a simultaneous multithread processor to resolve exception conditionsIBM·Filed 2003·Granted May 1, 2007·11 cites·15 claims
- 2465US7363625B2Method for changing a thread priority in a simultaneous multithread processorIBM·Filed 2003·Granted Apr 22, 2008·9 cites·2 claims
- 2565US7363469B2Method and system for on-demand scratch register renamingIBM·Filed 2006·Granted Apr 22, 2008·3 cites·7 claims
- 2664US8086826B2Dependency tracking for enabling successive processor instructions to issueBROWN MARY DOUGLASS·Filed 2009·Granted Dec 27, 2011·4 cites·25 claims
- 2763US6748493B1Method and apparatus for managing memory operations in a data processing system using a store bufferIBM·Filed 1998·Granted Jun 8, 2004·41 cites·15 claims
- 2858US8495342B2Configuring plural cores to perform an instruction having a multi-core characteristicCAPPS JR LOUIS B·Filed 2008·Granted Jul 23, 2013·1 cites·20 claims
- 2958US5446845ASteering logic to directly connect devices having different data word widthsIBM·Filed 1993·Granted Aug 29, 1995·35 cites·15 claims
- 3057US6275918B1Obtaining load target operand pre-fetch address from history table information upon incremented number of access indicator thresholdIBM·Filed 1999·Granted Aug 14, 2001·32 cites·17 claims
- 3155US12175251B2Compression of entries in a reorder bufferADVANCED RISC MACH LTD·Filed 2023·Granted Dec 24, 2024·0 cites·16 claims
- 3255US12026515B2Instruction fusionADVANCED RISC MACH LTD·Filed 2022·Granted Jul 2, 2024·0 cites·14 claims
- 3355US2025272103A1Speculation throttlingADVANCED RISC MACH LTD·Filed 2024·Application pending·0 cites
- 3454US12045620B2Move eliminationADVANCED RISC MACH LTD·Filed 2021·Granted Jul 23, 2024·0 cites·8 claims
- 3554US6430680B1Processor and method of prefetching data based upon a detected strideIBM·Filed 1998·Granted Aug 6, 2002·29 cites·16 claims
- 3653US2009055631A1Method And Apparatus For Register Renaming Using Multiple Physical Register Files And Avoiding Associative SearchIBM·Filed 2008·Application pending·0 cites
- 3752US2008109640A1Method For Changing A Thread Priority In A Simultaneous Multithread ProcessorIBM·Filed 2008·Application pending·0 cites
- 3851US10977038B2Checkpointing speculative register mappingsADVANCED RISC MACH LTD·Filed 2019·Granted Apr 13, 2021·0 cites·15 claims
- 3950US7971161B2Apparatus and method for implementing speculative clock gating of digital logic circuitsIBM·Filed 2008·Granted Jun 28, 2011·0 cites·24 claims
- 4049US2008127197A1Method and system for on-demand scratch register renamingABERNATHY CHRISTOPHER M·Filed 2008·Application pending·0 cites
- 4149US2010257339A1Dependency Matrix with Improved PerformanceIBM·Filed 2009·Application pending·0 cites
- 4249US2010257341A1Selective Execution Dependency MatrixIBM·Filed 2009·Application pending·0 cites
- 4348US8078999B2Structure for implementing speculative clock gating of digital logic circuitsBLANER BARTHOLOMEW·Filed 2008·Granted Dec 13, 2011·0 cites·10 claims
- 4447US11204773B2Storing a processing state based on confidence in a predicted branch outcome and a number of recent state changesADVANCED RISC MACH LTD·Filed 2018·Granted Dec 21, 2021·0 cites·9 claims
- 4546US2009113182A1System and Method for Issuing Load-Dependent Instructions from an Issue Queue in a Processing UnitABERNATHY CHRISTOPHER M·Filed 2007·Application pending·0 cites
- 4646US2008244242A1Using a Register File as Either a Rename Buffer or an Architected Register FileABERNATHY CHRISTOPHER M·Filed 2007·Application pending·0 cites
- 4744US7536395B2Efficient dynamic register file design for multiple simultaneous bit encodingsIBM·Filed 2006·Granted May 19, 2009·2 cites·2 claims
- 4844US2004216101A1Method and logical apparatus for managing resource redistribution in a simultaneous multi-threaded (SMT) processorIBM·Filed 2003·Application pending·0 cites
- 4944US2004216103A1Mechanism for detecting and handling a starvation of a thread in a multithreading processor environmentIBM·Filed 2003·Application pending·0 cites
- 5044US2004215937A1Dynamically share interrupt handling logic among multiple threadsIBM·Filed 2003·Application pending·0 cites
Showing the top 50 of 51 patent records by PatentIndex Score.
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