Inventor · disambiguated record
Vamsi K. Paruchuri
Also filed as: PARUCHURI VAMSI · PARUCHURI VAMSI K · PARUCHURI VAMSI KRISHNA
88 granted patents·25 pending applications·1,049 citations·filing 2004–2025
99Inventor score
Top patents by PatentIndex Score
113 records- 0198US9589845B1Fin cut enabling single diffusion breaksIBM·Filed 2016·Granted Mar 7, 2017·42 cites·20 claims
- 0298US9490255B1Complementary metal oxide semiconductor replacement gate high-k metal gate devices with work function adjustmentsIBM·Filed 2015·Granted Nov 8, 2016·25 cites·20 claims
- 0398US7855105B1Planar and non-planar CMOS devices with multiple tuned threshold voltagesIBM·Filed 2009·Granted Dec 21, 2010·83 cites·14 claims
- 0497US7432567B2Metal gate CMOS with at least a single gate metal and dual gate dielectricsIBM·Filed 2005·Granted Oct 7, 2008·58 cites·13 claims
- 0597US7105889B2Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectricsIBM·Filed 2004·Granted Sep 12, 2006·93 cites·26 claims
- 0696US11830732B2Selective passivation and selective depositionASM IP HOLDING BV·Filed 2021·Granted Nov 28, 2023·2 cites·20 claims
- 0796US11145506B2Selective passivation and selective depositionASM IP HOLDING BV·Filed 2019·Granted Oct 12, 2021·12 cites·23 claims
- 0896US8999779B2Locally raised epitaxy for improved contact by local silicon capping during trench silicide processingsIBM·Filed 2013·Granted Apr 7, 2015·23 cites·8 claims
- 0996US7718496B2Techniques for enabling multiple Vt devices using high-K metal gate stacksIBM·Filed 2007·Granted May 18, 2010·32 cites·5 claims
- 1095US9449874B1Self-forming barrier for subtractive copperIBM·Filed 2015·Granted Sep 20, 2016·11 cites·15 claims
- 1195US7696036B2CMOS transistors with differential oxygen content high-k dielectricsIBM·Filed 2007·Granted Apr 13, 2010·33 cites·7 claims
- 1294US9305883B2Locally raised epitaxy for improved contact by local silicon capping during trench silicide processingsGLOBALFOUNDRIES INC·Filed 2015·Granted Apr 5, 2016·10 cites·11 claims
- 1394US8309447B2Method for integrating multiple threshold voltage devices for CMOSCHENG KANGGUO·Filed 2010·Granted Nov 13, 2012·21 cites·27 claims
- 1494US8212322B2Techniques for enabling multiple Vt devices using high-K metal gate stacksFRANK MARTIN M·Filed 2010·Granted Jul 3, 2012·16 cites·18 claims
- 1594US7863126B2Fabrication of a CMOS structure with a high-k dielectric layer oxidizing an aluminum layer in PFET regionIBM·Filed 2008·Granted Jan 4, 2011·25 cites·10 claims
- 1693US8035173B2CMOS transistors with differential oxygen content high-K dielectricsIBM·Filed 2010·Granted Oct 11, 2011·14 cites·12 claims
- 1792US8981466B2Multilayer dielectric structures for semiconductor nano-devicesIBM·Filed 2013·Granted Mar 17, 2015·13 cites·15 claims
- 1892US7750418B2Introduction of metal impurity to change workfunction of conductive electrodesIBM·Filed 2008·Granted Jul 6, 2010·18 cites·31 claims
- 1992US7598545B2Using metal/metal nitride bilayers as gate electrodes in self-aligned aggressively scaled CMOS devicesIBM·Filed 2005·Granted Oct 6, 2009·20 cites·28 claims
- 2092US7569466B2Dual metal gate self-aligned integrationIBM·Filed 2005·Granted Aug 4, 2009·19 cites·10 claims
- 2192US7452767B2Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectricsIBM·Filed 2006·Granted Nov 18, 2008·15 cites·4 claims
- 2292US7446380B2Stabilization of flatband voltages and threshold voltages in hafnium oxide based silicon transistors for CMOSIBM·Filed 2005·Granted Nov 4, 2008·20 cites·15 claims
- 2391US8304836B2Structure and method to obtain EOT scaled dielectric stacksJAGANNATHAN HEMANTH·Filed 2009·Granted Nov 6, 2012·10 cites·18 claims
- 2491US8193051B2Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectricsBOJARCZUK JR NESTOR A·Filed 2011·Granted Jun 5, 2012·14 cites·11 claims
- 2591US7928514B2Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectricsIBM·Filed 2009·Granted Apr 19, 2011·12 cites·16 claims
- 2690US7807525B2Low power circuit structure with metal gate and high-k dielectricIBM·Filed 2009·Granted Oct 5, 2010·15 cites·11 claims
- 2790US7479683B2Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectricsIBM·Filed 2004·Granted Jan 20, 2009·35 cites·17 claims
- 2890US7242055B2Nitrogen-containing field effect transistor gate stack containing a threshold voltage control layer formed via deposition of a metal oxideIBM·Filed 2004·Granted Jul 10, 2007·51 cites·34 claims
- 2989US8741757B2Replacement gate electrode with multi-thickness conductive metallic nitride layersJAGANNATHAN HEMANTH·Filed 2012·Granted Jun 3, 2014·8 cites·19 claims
- 3089US7745278B2Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high K dielectricsIBM·Filed 2008·Granted Jun 29, 2010·10 cites·22 claims
- 3189US7709902B2Metal gate CMOS with at least a single gate metal and dual gate dielectricsIBM·Filed 2008·Granted May 4, 2010·11 cites·12 claims
- 3289US7666732B2Method of fabricating a metal gate CMOS with at least a single gate metal and dual gate dielectricsIBM·Filed 2008·Granted Feb 23, 2010·11 cites·14 claims
- 3388US8980715B2Multilayer dielectric structures for semiconductor nano-devicesIBM·Filed 2013·Granted Mar 17, 2015·8 cites·19 claims
- 3488US8030716B2Self-aligned CMOS structure with dual workfunctionIBM·Filed 2010·Granted Oct 4, 2011·8 cites·6 claims
- 3588US7868410B2Gate stack engineering by electrochemical processing utilizing through-gate-dielectric current flowIBM·Filed 2008·Granted Jan 11, 2011·13 cites·7 claims
- 3688US7425497B2Introduction of metal impurity to change workfunction of conductive electrodesIBM·Filed 2006·Granted Sep 16, 2008·14 cites·1 claims
- 3787US9202698B2Replacement gate electrode with multi-thickness conductive metallic nitride layersJAGANNATHAN HEMANTH·Filed 2012·Granted Dec 1, 2015·7 cites·24 claims
- 3887US9054109B2Corrosion/etching protection in integration circuit fabricationsLIN WEI·Filed 2012·Granted Jun 9, 2015·9 cites·22 claims
- 3987US8680623B2Techniques for enabling multiple Vt devices using high-K metal gate stacksFRANK MARTIN M·Filed 2012·Granted Mar 25, 2014·7 cites·14 claims
- 4086US10304746B2Complementary metal oxide semiconductor replacement gate high-K metal gate devices with work function adjustmentsIBM·Filed 2016·Granted May 28, 2019·3 cites·10 claims
- 4186US7872317B2Dual metal gate self-aligned integrationIBM·Filed 2009·Granted Jan 18, 2011·10 cites·11 claims
- 4285US12322593B2Selective passivation and selective depositionASM IP HOLDING BV·Filed 2023·Granted Jun 3, 2025·0 cites·20 claims
- 4385US8383483B2High performance CMOS circuits, and methods for fabricating sameIBM·Filed 2009·Granted Feb 26, 2013·10 cites·15 claims
- 4485US7820552B2Advanced high-k gate stack patterning and structure containing a patterned high-k gate stackIBM·Filed 2007·Granted Oct 26, 2010·10 cites·31 claims
- 4585US7723798B2Low power circuit structure with metal gate and high-k dielectricIBM·Filed 2007·Granted May 25, 2010·10 cites·10 claims
- 4685US7368045B2Gate stack engineering by electrochemical processing utilizing through-gate-dielectric current flowIBM·Filed 2005·Granted May 6, 2008·10 cites·39 claims
- 4784US7776680B2Complementary metal oxide semiconductor device with an electroplated metal replacement gateIBM·Filed 2008·Granted Aug 17, 2010·11 cites·25 claims
- 4884US2025279275A1Selective passivation and selective depositionASM IP HOLDING BV·Filed 2025·Application pending·0 cites
- 4983US10643890B2Ultrathin multilayer metal alloy liner for nano Cu interconnectsIBM·Filed 2016·Granted May 5, 2020·3 cites·9 claims
- 5083US7611979B2Metal gates with low charge trapping and enhanced dielectric reliability characteristics for high-k gate dielectric stacksIBM·Filed 2007·Granted Nov 3, 2009·8 cites·6 claims
Showing the top 50 of 113 patent records by PatentIndex Score.
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