Inventor · disambiguated record
Akira Kanuma
Also filed as: KANUMA AKIRA
19 granted patents·551 citations·filing 1980–2005
96Inventor score
Top patents by PatentIndex Score
19 records- 0194US4587445AData output circuit with means for preventing more than half the output lines from transitioning simultaneouslyTOSHIBA KK·Filed 1984·Granted May 6, 1986·58 cites·11 claims
- 0289US4388537ASubstrate bias generation circuitTOKYO SHIBAURA ELECTRIC CO·Filed 1980·Granted Jun 14, 1983·53 cites·6 claims
- 0380US4887267ALogic integrated circuit capable of simplifying a testTOSHIBA KK·Filed 1987·Granted Dec 12, 1989·37 cites·12 claims
- 0479US6223279B1Single chip microcomputer having a dedicated address bus and dedicated data bus for transferring register bank data to and from an on-line RAMTOSHIBA KK·Filed 1995·Granted Apr 24, 2001·103 cites·12 claims
- 0576US5557766AHigh-speed processor for handling multiple interrupts utilizing an exclusive-use bus and current and previous bank pointers to specify a return bankTOSHIBA KK·Filed 1992·Granted Sep 17, 1996·81 cites·5 claims
- 0669US4656370AIntegrated circuit with divided power supply wiringTOSHIBA KK·Filed 1984·Granted Apr 7, 1987·29 cites·5 claims
- 0762US5325513AApparatus for selectively accessing different memory types by storing memory correlation information in preprocessing mode and using the information in processing modeTOSHIBA KK·Filed 1992·Granted Jun 28, 1994·39 cites·2 claims
- 0860US7334171B2Test pattern generating apparatus, circuit designing apparatus, test pattern generating method, circuit designing method, test pattern generating program and circuit designing programFUJITSU LTD·Filed 2005·Granted Feb 19, 2008·3 cites·12 claims
- 0960US4546450APriority determination circuitTOKYO SHIBAURA ELECTRIC CO·Filed 1984·Granted Oct 8, 1985·25 cites·5 claims
- 1058US5077740ALogic circuit having normal input/output data paths disabled when test data is transferred during macrocell testingTOSHIBA KK·Filed 1989·Granted Dec 31, 1991·16 cites·10 claims
- 1155US4441158AArithmetic operation circuitTOKYO SHIBAURA ELECTRIC CO·Filed 1981·Granted Apr 3, 1984·20 cites·7 claims
- 1248US4649508AFloating-point arithmetic operation systemTOKYO SHIBAURA ELECTRIC CO·Filed 1983·Granted Mar 10, 1987·15 cites·7 claims
- 1346US4590584AMethod and system for processing exponents in floating-point multiplicationTOKYO SHIBAURA ELECTRIC CO·Filed 1983·Granted May 20, 1986·14 cites·7 claims
- 1444US4802133ALogic circuitTOSHIBA KK·Filed 1986·Granted Jan 31, 1989·9 cites·15 claims
- 1543US5276812AAddress multiplexing apparatusTOSHIBA KK·Filed 1991·Granted Jan 4, 1994·10 cites·3 claims
- 1642US5165034ALogic circuit including input and output registers with data bypass and computation circuit with data passTOSHIBA KK·Filed 1991·Granted Nov 17, 1992·14 cites·9 claims
- 1739US5586263AHigh speed data communication control device having an uncompetitive bus constructionTOSHIBA KK·Filed 1993·Granted Dec 17, 1996·14 cites·3 claims
- 1838US4924469ASemiconductor integrated circuit deviceTOSHIBA KK·Filed 1988·Granted May 8, 1990·8 cites·10 claims
- 1931US5287357ACommunication control device having an apparatus for detecting the absence of a control data on a ring communication networkTOSHIBA KK·Filed 1991·Granted Feb 15, 1994·3 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →