Inventor · disambiguated record
Masato Tatsuoka
Also filed as: TATSUOKA MASATO
8 granted patents·4 pending applications·43 citations·filing 1996–2009
82Inventor score
Files withFUJITSU LTD6FUJITSU MICROELECTRONICS LTD3FUJITSU SEMICONDUCTOR LTD1NAKABAYASHI SEIJI1TATSUOKA MASATO1
Top patents by PatentIndex Score
12 records- 0185US7873507B2Multi-core model simulatorFUJITSU LTD·Filed 2005·Granted Jan 18, 2011·18 cites·16 claims
- 0274US7908592B2Software/hardware partitioning program and methodFUJITSU SEMICONDUCTOR LTD·Filed 2006·Granted Mar 15, 2011·8 cites·6 claims
- 0373US7496490B2Multi-core-model simulation method, multi-core model simulator, and computer productFUJITSU MICROELECTRONICS LTD·Filed 2006·Granted Feb 24, 2009·7 cites·9 claims
- 0470US8725485B2Simulation method and simulation apparatusTATSUOKA MASATO·Filed 2008·Granted May 13, 2014·8 cites·13 claims
- 0546US2009037888A1Simulation of program execution to detect problem such as deadlockFUJITSU LTD·Filed 2008·Application pending·0 cites
- 0644US7729896B2Cycle simulation method, cycle simulator, and computer productFUJITSU MICROELECTRONICS LTD·Filed 2006·Granted Jun 1, 2010·0 cites·5 claims
- 0743US2009319983A1Intellectual property model creating apparatus, intellectual property model creating method, and computer productFUJITSU MICROELECTRONICS LTD·Filed 2009·Application pending·0 cites
- 0842US2007271080A1Model generation method for software/hardware collaboration designFUJITSU LTD·Filed 2006·Application pending·0 cites
- 0941US2007038429A1System simulation methodFUJITSU LTD·Filed 2006·Application pending·0 cites
- 1039US8881096B2Computer product, IP model generating apparatus, and IP model generating methodNAKABAYASHI SEIJI·Filed 2009·Granted Nov 4, 2014·0 cites·9 claims
- 1138US6522690B1Zero determination signal generating circuitFUJITSU LTD·Filed 2000·Granted Feb 18, 2003·0 cites·3 claims
- 1230US5729048ACmos ic device suppressing spike noiseFUJITSU LTD·Filed 1996·Granted Mar 17, 1998·2 cites·18 claims
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