Inventor · disambiguated record
Jeffrey H. Sloan
Also filed as: SLOAN JEFFREY H · SLOAN JEFFREY HUBERT
11 granted patents·156 citations·filing 1998–2014
90Inventor score
Top patents by PatentIndex Score
11 records- 0184US6157530AMethod and apparatus for providing ESD protectionIBM·Filed 1999·Granted Dec 5, 2000·48 cites·17 claims
- 0282US7348657B2Electrostatic discharge protection networks for triple well semiconductor devicesIBM·Filed 2006·Granted Mar 25, 2008·9 cites·11 claims
- 0382US6891207B2Electrostatic discharge protection networks for triple well semiconductor devicesIBM·Filed 2003·Granted May 10, 2005·29 cites·12 claims
- 0481US6292343B1ASIC book to provide ESD protection on an integrated circuitIBM·Filed 2000·Granted Sep 18, 2001·24 cites·13 claims
- 0578US6262873B1Method for providing ESD protection for an integrated circuitIBM·Filed 2000·Granted Jul 17, 2001·20 cites·5 claims
- 0673US8486796B2Thin film resistors and methods of manufactureHARMON DAVID L·Filed 2010·Granted Jul 16, 2013·4 cites·19 claims
- 0767US9236863B2Compensated impedance calibration circuitGLOBALFOUNDRIES INC·Filed 2014·Granted Jan 12, 2016·2 cites·13 claims
- 0854US6087881AIntegrated circuit dual level shift predrive circuitIBM·Filed 1998·Granted Jul 11, 2000·13 cites·12 claims
- 0952US6353524B1Input/output circuit having up-shifting circuitry for accommodating different voltage signalsIBM·Filed 2000·Granted Mar 5, 2002·6 cites·20 claims
- 1045US9270268B2Compensated impedance calibration circuitGLOBALFOUNDRIES INC·Filed 2013·Granted Feb 23, 2016·0 cites·10 claims
- 1143US7138701B2Electrostatic discharge protection networks for triple well semiconductor devicesIBM·Filed 2003·Granted Nov 21, 2006·1 cites·2 claims
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