Inventor · disambiguated record
Hsi-Mao Hsiao
Also filed as: HSIAO HSI-MAO
11 granted patents·182 citations·filing 1999–2004
90Inventor score
Top patents by PatentIndex Score
11 records- 0170US6291354B1Method of fabricating a semiconductive deviceUNITED MICROELECTRONICS CORP·Filed 1999·Granted Sep 18, 2001·42 cites·17 claims
- 0268US6194279B1Fabrication method for gate spacerUNITED SILICON INC·Filed 1999·Granted Feb 27, 2001·30 cites·22 claims
- 0367US6191029B1Damascene processUNITED SILICON INC·Filed 1999·Granted Feb 20, 2001·39 cites·19 claims
- 0466US6245626B1Method of fabricating a MOS device using a sacrificial layer and spacerUNITED MICROELECTRONICS CORP·Filed 1999·Granted Jun 12, 2001·27 cites·17 claims
- 0566US6146971AProcess for forming a shallow trench isolation structureUNITED MICROELECTRONICS CORP·Filed 2000·Granted Nov 14, 2000·16 cites·7 claims
- 0664US6291279B1Method for forming different types of MOS transistors on a semiconductor waferUNITED MICROELECTRONICS CORP·Filed 2000·Granted Sep 18, 2001·13 cites·15 claims
- 0753US6815337B1Method to improve borderless metal line process window for sub-micron designsEPISIL TECHNOLOGIES INC·Filed 2004·Granted Nov 9, 2004·6 cites·27 claims
- 0847US6329291B1Method of forming a lower storage node of a capacitor for dynamic random access memoryUNITED MICROELECTRONICS CORP·Filed 2000·Granted Dec 11, 2001·2 cites·15 claims
- 0933US6200886B1Fabricating process for polysilicon gateUNITED SILICON INC·Filed 1999·Granted Mar 13, 2001·5 cites·5 claims
- 1029US6133091AMethod of fabricating a lower electrode of capacitorUNITED SILICON INC·Filed 1999·Granted Oct 17, 2000·1 cites·20 claims
- 1126US6281133B1Method for forming an inter-layer dielectric layerUNITED MICROELECTRONICS CORP·Filed 1999·Granted Aug 28, 2001·1 cites·24 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →