Inventor · disambiguated record
Parijat Biswas
Also filed as: BISWAS PARIJAT
10 granted patents·3 pending applications·28 citations·filing 2011–2024
85Inventor score
Technology areasG06F
Top patents by PatentIndex Score
13 records- 0186US11853665B2Performing hardware description language transformationsSYNOPSYS INC·Filed 2021·Granted Dec 26, 2023·2 cites·17 claims
- 0278US11983474B1Connecting random variables to coverage targets using an ensemble of static analysis, dynamic analysis and machine learning and guided constraint solving of the random variables during simulation of an integrated circuitSYNOPSYS INC·Filed 2021·Granted May 14, 2024·1 cites·20 claims
- 0378US8443316B1Accelerating coverage convergence and debug using symbolic properties and local multi-path analysisBISWAS PARIJAT·Filed 2011·Granted May 14, 2013·11 cites·18 claims
- 0474US8386974B2Accelerating coverage convergence using symbolic propertiesSYNOPSYS INC·Filed 2011·Granted Feb 26, 2013·7 cites·18 claims
- 0571US10831961B2Automated coverage convergence by correlating random variables with coverage variables sampled from simulation result dataSYNOPSYS INC·Filed 2019·Granted Nov 10, 2020·2 cites·20 claims
- 0669US9684746B2Signal reconstruction in sequential logic circuitrySYNOPSYS INC·Filed 2015·Granted Jun 20, 2017·2 cites·17 claims
- 0762US10521528B2Signal reconstruction in sequential logic circuitrySYNOPSYS INC·Filed 2017·Granted Dec 31, 2019·1 cites·22 claims
- 0862US9727678B2Graphical view and debug for coverage-point negative hintSYNOPSYS INC·Filed 2014·Granted Aug 8, 2017·2 cites·20 claims
- 0952US11275877B2Hardware simulation systems and methods for reducing signal dumping time and size by fast dynamical partial aliasing of signals having similar waveformSYNOPSYS INC·Filed 2019·Granted Mar 15, 2022·0 cites·20 claims
- 1050US2025322129A1Bucketization scheme for functional verificationSYNOPSYS INC·Filed 2024·Application pending·0 cites
- 1149US10606977B2Graphical view and debug for coverage-point negative hintSYNOPSYS INC·Filed 2017·Granted Mar 31, 2020·0 cites·15 claims
- 1248US2025068812A1Improving coverage in functional verification by coordinated randomization of variables across multiple classesSYNOPSYS INC·Filed 2023·Application pending·0 cites
- 1342US2023409788A1Synchronizing distributed simulations of a circuit designSYNOPSYS INC·Filed 2022·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →