Inventor · disambiguated record
Mou C. Lin
Also filed as: LIN MOU C
16 granted patents·186 citations·filing 2003–2009
93Inventor score
Files withLATTICE SEMICONDUCTOR CORP16
Top patents by PatentIndex Score
16 records- 0190US7605609B1Programmable level shifterLATTICE SEMICONDUCTOR CORP·Filed 2007·Granted Oct 20, 2009·19 cites·16 claims
- 0290US7495467B2Temperature-independent, linear on-chip termination resistanceLATTICE SEMICONDUCTOR CORP·Filed 2005·Granted Feb 24, 2009·16 cites·19 claims
- 0387US7129749B1Programmable logic device having a configurable DRAM with transparent refreshLATTICE SEMICONDUCTOR CORP·Filed 2004·Granted Oct 31, 2006·34 cites·19 claims
- 0487US6967500B1Electronic circuit with on-chip programmable terminationsLATTICE SEMICONDUCTOR CORP·Filed 2003·Granted Nov 22, 2005·36 cites·21 claims
- 0582US7262630B1Programmable termination for single-ended and differential schemesLATTICE SEMICONDUCTOR CORP·Filed 2005·Granted Aug 28, 2007·11 cites·30 claims
- 0676US7547995B1Dynamic over-voltage protection scheme for interface circuitryLATTICE SEMICONDUCTOR CORP·Filed 2006·Granted Jun 16, 2009·8 cites·9 claims
- 0776US6924659B1Programmable signal termination for FPGAs and the likeLATTICE SEMICONDUCTOR CORP·Filed 2003·Granted Aug 2, 2005·23 cites·19 claims
- 0870US7586325B1Integrated circuit having independent voltage and process/temperature controlLATTICE SEMICONDUCTOR CORP·Filed 2007·Granted Sep 8, 2009·6 cites·12 claims
- 0962US6859066B1Bank-based input/output buffers with multiple reference voltagesLATTICE SEMICONDUCTOR CORP·Filed 2003·Granted Feb 22, 2005·10 cites·16 claims
- 1057US7215149B1Interface circuitry for electrical systemsLATTICE SEMICONDUCTOR CORP·Filed 2004·Granted May 8, 2007·7 cites·30 claims
- 1152US7714608B1Temperature-independent, linear on-chip termination resistanceLATTICE SEMICONDUCTOR CORP·Filed 2009·Granted May 11, 2010·0 cites·15 claims
- 1250US7230810B1Dynamic over-voltage protection scheme for integrated-circuit devicesLATTICE SEMICONDUCTOR CORP·Filed 2004·Granted Jun 12, 2007·4 cites·22 claims
- 1350US7161862B1Low power asynchronous sense ampLATTICE SEMICONDUCTOR CORP·Filed 2004·Granted Jan 9, 2007·6 cites·18 claims
- 1450US6943583B1Programmable I/O structure for FPGAs and the like having reduced pad capacitanceLATTICE SEMICONDUCTOR CORP·Filed 2003·Granted Sep 13, 2005·5 cites·24 claims
- 1540US6943582B1Programmable I/O structure for FPGAs and the like having shared circuitryLATTICE SEMICONDUCTOR CORP·Filed 2003·Granted Sep 13, 2005·1 cites·34 claims
- 1639US7443192B1Output buffer with digital slew controlLATTICE SEMICONDUCTOR CORP·Filed 2006·Granted Oct 28, 2008·0 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →