Inventor · disambiguated record
Hung H. Tran
Also filed as: TRAN HUNG · TRAN HUNG H · TRAN HUNG HOANG
19 granted patents·2 pending applications·59 citations·filing 2011–2022
92Inventor score
Top patents by PatentIndex Score
21 records- 0193US9509281B1Peaking inductor array for peaking control unit of transceiverIBM·Filed 2016·Granted Nov 29, 2016·8 cites·1 claims
- 0291US10236344B2Tunnel transistors with abrupt junctionsIBM·Filed 2015·Granted Mar 19, 2019·7 cites·13 claims
- 0389US8866266B2Silicon nanotube MOSFETIBM·Filed 2013·Granted Oct 21, 2014·9 cites·22 claims
- 0486US8871576B2Silicon nanotube MOSFETTEKLEAB DANIEL·Filed 2011·Granted Oct 28, 2014·11 cites·16 claims
- 0584US8975123B2Tunnel field-effect transistors with a gate-swing broken-gap heterostructureIBM·Filed 2013·Granted Mar 10, 2015·7 cites·15 claims
- 0683US9577607B1Peaking inductor array for peaking control unit of transceiverIBM·Filed 2015·Granted Feb 21, 2017·3 cites·12 claims
- 0782US9712144B2Fine delay structure with programmable delay rangesIBM·Filed 2015·Granted Jul 18, 2017·3 cites·7 claims
- 0882US9628059B2Fine delay structure with programmable delay rangesIBM·Filed 2015·Granted Apr 18, 2017·3 cites·8 claims
- 0977US9748927B2Peaking inductor array for peaking control unit of transceiverIBM·Filed 2016·Granted Aug 29, 2017·2 cites·1 claims
- 1069US9337088B2MOL resistor with metal grid heat shieldIBM·Filed 2014·Granted May 10, 2016·2 cites·18 claims
- 1166US10103226B2Method of fabricating tunnel transistors with abrupt junctionsVEGA REINALDO A·Filed 2012·Granted Oct 16, 2018·2 cites·8 claims
- 1266US9058460B2Thermally-optimized metal fill for stacked chip systemsIBM·Filed 2013·Granted Jun 16, 2015·2 cites·16 claims
- 1359US10892743B2Fine delay structure with programmable delay rangesIBM·Filed 2019·Granted Jan 12, 2021·0 cites·7 claims
- 1456US10038468B2Peaking inductor array for peaking control unit of transceiverIBM·Filed 2017·Granted Jul 31, 2018·0 cites·1 claims
- 1556US9087717B2Tunnel field-effect transistors with a gate-swing broken-gap heterostructureIBM·Filed 2014·Granted Jul 21, 2015·0 cites·12 claims
- 1654US10291217B2Fine delay structure with programmable delay rangesIBM·Filed 2017·Granted May 14, 2019·0 cites·9 claims
- 1753US10658973B2Reconfigurable allocation of VNCAP inter-layer vias for co-tuning of L and C in LC tankIBM·Filed 2018·Granted May 19, 2020·0 cites·19 claims
- 1852US2024134600A1Floating-point unit with a fused multiply-add (fma) engine for generating binary integer output or floating point output based on a selectorIBM·Filed 2022·Application pending·0 cites
- 1946US2016125115A1Generating an electromagnetic parameterized cell for an integrated circuit designIBM·Filed 2014·Application pending·0 cites
- 2044US9559162B2Thermoresistance sensor structure for integrated circuits and method of makingGLOBALFOUNDRIES INC·Filed 2013·Granted Jan 31, 2017·0 cites·18 claims
- 2142US9954487B1Tuning LC tank circuitsIBM·Filed 2016·Granted Apr 24, 2018·0 cites·18 claims
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