Inventor · disambiguated record
David D. Siek
Also filed as: SIEK DAVID D
13 granted patents·1 pending application·510 citations·filing 1996–2005
94Inventor score
Files withMICRON TECHNOLOGY INC14
Top patents by PatentIndex Score
14 records- 0194US6066870ASingle digit line with cell contact interconnectMICRON TECHNOLOGY INC·Filed 1998·Granted May 23, 2000·191 cites·23 claims
- 0293US6735132B26F2 DRAM array with apparatus for stress testing an isolation gate and methodMICRON TECHNOLOGY INC·Filed 2003·Granted May 11, 2004·58 cites·32 claims
- 0388US5986955AMethod and apparatus for hiding data path equilibration timeMICRON TECHNOLOGY INC·Filed 1999·Granted Nov 16, 1999·83 cites·49 claims
- 0486US6930503B2System for testing integrated circuit devicesMICRON TECHNOLOGY INC·Filed 2004·Granted Aug 16, 2005·28 cites·40 claims
- 0585US6496027B1System for testing integrated circuit devicesMICRON TECHNOLOGY INC·Filed 1997·Granted Dec 17, 2002·50 cites·23 claims
- 0684US6590817B26F2 DRAM array with apparatus for stress testing an isolation gate and methodMICRON TECHNOLOGY INC·Filed 2001·Granted Jul 8, 2003·25 cites·47 claims
- 0782US6756805B2System for testing integrated circuit devicesMICRON TECHNOLOGY INC·Filed 2002·Granted Jun 29, 2004·23 cites·24 claims
- 0876US6510533B1Method for detecting or repairing intercell defects in more than one array of a memory deviceMICRON TECHNOLOGY INC·Filed 2000·Granted Jan 21, 2003·21 cites·18 claims
- 0975US7180802B2Method of stress-testing an isolation gate in a dynamic random access memoryMICRON TECHNOLOGY INC·Filed 2005·Granted Feb 20, 2007·4 cites·6 claims
- 1064US6870750B2DRAM array and computer systemMICRON TECHNOLOGY INC·Filed 2004·Granted Mar 22, 2005·7 cites·23 claims
- 1149US6167541AMethod for detecting or preparing intercell defects in more than one array of a memory deviceMICRON TECHNOLOGY INC·Filed 1998·Granted Dec 26, 2000·11 cites·17 claims
- 1244US5866928ASingle digit line with cell contact interconnectMICRON TECHNOLOGY INC·Filed 1996·Granted Feb 2, 1999·9 cites·20 claims
- 1341US6999362B2Method of stress-testing an isolation gate in a dynamic random access memoryMICRON TECHNOLOGY INC·Filed 2004·Granted Feb 14, 2006·0 cites·3 claims
- 1440US2005270058A1System for testing integrated circuit devicesMICRON TECHNOLOGY INC·Filed 2005·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →