Inventor · disambiguated record
Gautam Bhatia
Also filed as: BHATIA GAUTAM
14 granted patents·5 pending applications·8 citations·filing 2012–2025
85Inventor score
Files withNVIDIA CORP19
Top patents by PatentIndex Score
19 records- 0189US11742007B2Techniques for performing write training on a dynamic random-access memoryNVIDIA CORP·Filed 2021·Granted Aug 29, 2023·2 cites·20 claims
- 0288US12135607B2Hardware-efficient PAM-3 encoder and decoderNVIDIA CORP·Filed 2023·Granted Nov 5, 2024·1 cites·27 claims
- 0382US2025328261A1Techniques for performing write training on a dynamic random-access memoryNVIDIA CORP·Filed 2025·Application pending·0 cites
- 0482US2025298544A1Techniques for transferring commands to a dynamic random-access memoryNVIDIA CORP·Filed 2025·Application pending·0 cites
- 0577US12386523B2Techniques for performing write training on a dynamic random-access memoryNVIDIA CORP·Filed 2023·Granted Aug 12, 2025·0 cites·20 claims
- 0675US12353767B2Techniques for transferring commands to a dynamic random-access memoryNVIDIA CORP·Filed 2023·Granted Jul 8, 2025·0 cites·20 claims
- 0773US12197281B2Hardware-efficient PAM-3 encoder and decoderNVIDIA CORP·Filed 2023·Granted Jan 14, 2025·0 cites·28 claims
- 0872US9184907B2Flexible threshold counter for clock-and-data recoveryNVIDIA CORP·Filed 2012·Granted Nov 10, 2015·3 cites·20 claims
- 0970US11809719B2Techniques for performing write training on a dynamic random-access memoryNVIDIA CORP·Filed 2021·Granted Nov 7, 2023·0 cites·20 claims
- 1068US11861229B2Techniques for transferring commands to a dynamic random-access memoryNVIDIA CORP·Filed 2021·Granted Jan 2, 2024·0 cites·20 claims
- 1168US9762381B2Adaptation of crossing DFE tap weightNVIDIA CORP·Filed 2013·Granted Sep 12, 2017·2 cites·23 claims
- 1261US12142344B2Techniques for reducing DRAM power usage in performing read and write operationsNVIDIA CORP·Filed 2022·Granted Nov 12, 2024·0 cites·20 claims
- 1360US11573854B2Techniques for data scrambling on a memory interfaceNVIDIA CORP·Filed 2021·Granted Feb 7, 2023·0 cites·20 claims
- 1459US2025238314A1Techniques for data scrambling on a memory interfaceNVIDIA CORP·Filed 2025·Application pending·0 cites
- 1556US12298845B2Techniques for data scrambling on a memory interfaceNVIDIA CORP·Filed 2022·Granted May 13, 2025·0 cites·22 claims
- 1653US11742006B2Techniques for performing command address in interface training on a dynamic random-access memoryNVIDIA CORP·Filed 2021·Granted Aug 29, 2023·0 cites·20 claims
- 1751US12347508B2Error detection pin encoding scheme to avoid maximum transitions and further improve signal integrity on high speed graphic memory interfacesNVIDIA CORP·Filed 2022·Granted Jul 1, 2025·0 cites·25 claims
- 1843US2014164847A1Internal Logic Analyzer with Programmable Window CaptureNVIDIA CORP·Filed 2012·Application pending·0 cites
- 1939US2014314138A1Back channel adaptation for transmission under peak power constraintsNVIDIA CORP·Filed 2013·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →