Inventor · disambiguated record
William C. Wille
Also filed as: WILLE WILLIAM · WILLE WILLIAM C
17 granted patents·3 pending applications·634 citations·filing 1997–2007
95Inventor score
Top patents by PatentIndex Score
20 records- 0198US6621392B1Micro electromechanical switch having self-aligned spacersIBM·Filed 2002·Granted Sep 16, 2003·211 cites·20 claims
- 0294US7202513B1Stress engineering using dual pad nitride with selective SOI device architectureIBM·Filed 2005·Granted Apr 10, 2007·30 cites·10 claims
- 0392US7030031B2Method for forming damascene structure utilizing planarizing material coupled with diffusion barrier materialIBM·Filed 2003·Granted Apr 18, 2006·69 cites·94 claims
- 0486US7635899B2Structure and method to form improved isolation in a semiconductor deviceIBM·Filed 2007·Granted Dec 22, 2009·14 cites·7 claims
- 0580US5811357AProcess of etching an oxide layerIBM·Filed 1997·Granted Sep 22, 1998·57 cites·13 claims
- 0677US7183130B2Magnetic random access memory and method of fabricating thereofIBM·Filed 2003·Granted Feb 27, 2007·27 cites·13 claims
- 0776US6143635AField effect transistors with improved implants and method for making such transistorsIBM·Filed 1999·Granted Nov 7, 2000·37 cites·29 claims
- 0875US6040214AMethod for making field effect transistors having sub-lithographic gates with vertical side wallsIBM·Filed 1998·Granted Mar 21, 2000·47 cites·29 claims
- 0971US7550364B2Stress engineering using dual pad nitride with selective SOI device architectureIBM·Filed 2007·Granted Jun 23, 2009·4 cites·16 claims
- 1069US6093281ABaffle plate design for decreasing conductance lost during precipitation of polymer precursors in plasma etching chambersIBM·Filed 1998·Granted Jul 25, 2000·19 cites·21 claims
- 1168US7838390B2Methods of forming integrated circuit devices having ion-cured electrically insulating layers thereinSAMSUNG ELECTRONICS CO LTD·Filed 2007·Granted Nov 23, 2010·4 cites·7 claims
- 1267US6461529B1Anisotropic nitride etch process with high selectivity to oxide and photoresist layers in a damascene etch schemeIBM·Filed 1999·Granted Oct 8, 2002·34 cites·4 claims
- 1364US6762667B2Micro electromechanical switch having self-aligned spacersIBM·Filed 2003·Granted Jul 13, 2004·10 cites·8 claims
- 1461US6207353B1Resist formulation which minimizes blistering during etchingIBM·Filed 1997·Granted Mar 27, 2001·28 cites·20 claims
- 1560US6361402B1Method for planarizing photoresistIBM·Filed 1999·Granted Mar 26, 2002·26 cites·22 claims
- 1646US2009047791A1Semiconductor etching methodsIBM·Filed 2007·Application pending·0 cites
- 1744US5976982AMethods for protecting device components from chemical mechanical polish induced defectsSIEMENS AG·Filed 1997·Granted Nov 2, 1999·12 cites·19 claims
- 1842US2007293016A1Semiconductor structure including isolation region with variable linewidth and method for fabrication therofIBM·Filed 2006·Application pending·0 cites
- 1940US2007267671A1Trench capacitor having lateral extensions in only one direction and related methodsIBM·Filed 2006·Application pending·0 cites
- 2038US6593617B1Field effect transistors with vertical gate side walls and method for making such transistorsIBM·Filed 1998·Granted Jul 15, 2003·5 cites·13 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →