Inventor · disambiguated record
Kambiz Samadi
Also filed as: SAMADI KAMBIZ
17 granted patents·7 pending applications·117 citations·filing 2013–2019
92Inventor score
Files withQUALCOMM INC24
Top patents by PatentIndex Score
24 records- 0197US10121743B2Power distribution networks for a three-dimensional (3D) integrated circuit (IC) (3DIC)QUALCOMM INC·Filed 2017·Granted Nov 6, 2018·31 cites·16 claims
- 0297US9754923B1Power gate placement techniques in three-dimensional (3D) integrated circuits (ICs) (3DICs)QUALCOMM INC·Filed 2016·Granted Sep 5, 2017·30 cites·16 claims
- 0393US9741691B2Power delivery network (PDN) design for monolithic three-dimensional (3-D) integrated circuit (IC)QUALCOMM INC·Filed 2015·Granted Aug 22, 2017·14 cites·6 claims
- 0487US9098666B2Clock distribution network for 3D integrated circuitQUALCOMM INC·Filed 2013·Granted Aug 4, 2015·8 cites·24 claims
- 0585US10176147B2Multi-processor core three-dimensional (3D) integrated circuits (ICs) (3DICs), and related methodsQUALCOMM INC·Filed 2017·Granted Jan 8, 2019·5 cites·37 claims
- 0684US9629233B2Techniques for implementing a synthetic jet to cool a deviceQUALCOMM INC·Filed 2015·Granted Apr 18, 2017·4 cites·27 claims
- 0784US9147438B2Monolithic three dimensional (3D) integrated circuits (ICs) (3DICs) with vertical memory components, related systems and methodsQUALCOMM INC·Filed 2014·Granted Sep 29, 2015·7 cites·21 claims
- 0882US9123721B2Placement of monolithic inter-tier vias (MIVs) within monolithic three dimensional (3D) integrated circuits (ICs) (3DICs) using clustering to increase usable whitespaceQUALCOMM INC·Filed 2013·Granted Sep 1, 2015·5 cites·15 claims
- 0977US9064077B23D floorplanning using 2D and 3D blocksQUALCOMM INC·Filed 2013·Granted Jun 23, 2015·5 cites·18 claims
- 1074US9483598B2Intellectual property block design with folded blocks and duplicated pins for 3D integrated circuitsQUALCOMM INC·Filed 2015·Granted Nov 1, 2016·2 cites·21 claims
- 1173US10510651B2Hard macro having blockage sites, integrated circuit including same and method of routing through a hard macroQUALCOMM INC·Filed 2018·Granted Dec 17, 2019·1 cites·6 claims
- 1273US9041448B2Flip-flops in a monolithic three-dimensional (3D) integrated circuit (IC) (3DIC) and related methodsQUALCOMM INC·Filed 2013·Granted May 26, 2015·3 cites·20 claims
- 1363US11004780B2Hard macro having blockage sites, integrated circuit including same and method of routing through a hard macroQUALCOMM INC·Filed 2019·Granted May 11, 2021·0 cites·19 claims
- 1463US10192813B2Hard macro having blockage sites, integrated circuit including same and method of routing through a hard macroQUALCOMM INC·Filed 2013·Granted Jan 29, 2019·1 cites·17 claims
- 1561US9508615B2Clock tree synthesis for low cost pre-bond testing of 3D integrated circuitsQUALCOMM INC·Filed 2015·Granted Nov 29, 2016·1 cites·20 claims
- 1651US2019027435A1Power distribution networks for a three-dimensional (3d) integrated circuit (ic) (3dic)QUALCOMM INC·Filed 2018·Application pending·0 cites
- 1746US2015112646A1METHODS OF DESIGNING THREE DIMENSIONAL (3D) INTEGRATED CIRCUITS (ICs) (3DICs) AND RELATED SYSTEMS AND COMPONENTSQUALCOMM INC·Filed 2013·Application pending·0 cites
- 1845US2015103866A1DIGITAL TEMPERATURE ESTIMATORS (DTEs) DISPOSED IN INTEGRATED CIRCUITS (ICs) FOR ESTIMATING TEMPERATURE WITHIN THE ICs, AND RELATED SYSTEMS AND METHODSQUALCOMM INC·Filed 2013·Application pending·0 cites
- 1944US2015333005A1PLACEMENT OF MONOLITHIC INTER-TIER VIAS (MIVs) WITHIN MONOLITHIC THREE DIMENSIONAL (3D) INTEGRATED CIRCUITS (ICs) (3DICs) USING CLUSTERING TO INCREASE USABLE WHITESPACQUALCOMM INC·Filed 2015·Application pending·0 cites
- 2041US2019259677A1Device comprising integration of die to die with polymer planarization layerQUALCOMM INC·Filed 2018·Application pending·0 cites
- 2140US9929733B1Connection propagation for inter-logical block connections in integrated circuitsQUALCOMM INC·Filed 2017·Granted Mar 27, 2018·0 cites·16 claims
- 2238US9626311B2Memory controller placement in a three-dimensional (3D) integrated circuit (IC) (3DIC) employing distributed through-silicon-via (TSV) farmsQUALCOMM INC·Filed 2015·Granted Apr 18, 2017·0 cites·25 claims
- 2335US2016042110A1High quality physical design for monolithic three-dimensional integrated circuits (3d ic) using two-dimensional integrated circuit (2d ic) design toolsQUALCOMM INC·Filed 2015·Application pending·0 cites
- 2434US2017092558A1Enhancement of chip thermal performance through silicon thermal conductivity modulationQUALCOMM INC·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →