Inventor · disambiguated record
Cameron Mcclintock
Also filed as: MCCLINTOCK CAMERON · MCCLINTOCK CAMERON R
76 granted patents·1 pending application·4,136 citations·filing 1990–2014
99Inventor score
Top patents by PatentIndex Score
77 records- 0199US6215326B1Programmable logic device architecture with super-regions having logic regions and a memory regionALTERA CORP·Filed 1999·Granted Apr 10, 2001·331 cites·20 claims
- 0299US5550782AProgrammable logic array integrated circuitsALTERA CORP·Filed 1994·Granted Aug 27, 1996·369 cites·21 claims
- 0399US5537057AProgrammable logic array device with grouped logic regions and three types of conductorsALTERA CORP·Filed 1995·Granted Jul 16, 1996·326 cites·43 claims
- 0498US6271679B1I/O cell configuration for multiple I/O standardsALTERA CORP·Filed 2000·Granted Aug 7, 2001·103 cites·15 claims
- 0598US6134173AProgrammable logic array integrated circuitsALTERA CORP·Filed 1998·Granted Oct 17, 2000·143 cites·108 claims
- 0698US5828229AProgrammable logic array integrated circuitsALTERA CORP·Filed 1997·Granted Oct 27, 1998·185 cites·3 claims
- 0798US5241224AHigh-density erasable programmable logic device architecture using multiplexer interconnectionsALTERA CORP·Filed 1991·Granted Aug 31, 1993·178 cites·19 claims
- 0897US6157210AProgrammable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuitsALTERA CORP·Filed 1998·Granted Dec 5, 2000·157 cites·119 claims
- 0997US5909126AProgrammable logic array integrated circuit devices with interleaved logic array blocksALTERA CORP·Filed 1996·Granted Jun 1, 1999·133 cites·43 claims
- 1097US5541530AProgrammable logic array integrated circuits with blocks of logic regions grouped into super-blocksALTERA CORP·Filed 1995·Granted Jul 30, 1996·181 cites·14 claims
- 1196US6166559ARedundancy circuitry for logic circuitsALTERA CORP·Filed 2000·Granted Dec 26, 2000·65 cites·29 claims
- 1296US6107824ACircuitry and methods for internal interconnection of programmable logic devicesALTERA CORP·Filed 1998·Granted Aug 22, 2000·103 cites·158 claims
- 1396US5444394APLD with selective inputs from local and global conductorsALTERA CORP·Filed 1993·Granted Aug 22, 1995·157 cites·7 claims
- 1495US5982195AProgrammable logic device architecturesALTERA CORP·Filed 1997·Granted Nov 9, 1999·114 cites·21 claims
- 1595US5848005AProgrammable logic array integrated circuitsALTERA CORP·Filed 1997·Granted Dec 8, 1998·66 cites·11 claims
- 1695US5668771AProgrammable logic array integrated circuitsALTERA CORP·Filed 1996·Granted Sep 16, 1997·71 cites·15 claims
- 1795US5598109AProgrammable logic array device with grouped logic regions and three types of conductorsALTERA CORP·Filed 1996·Granted Jan 28, 1997·116 cites·25 claims
- 1894US6897678B2Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuitsALTERA CORP·Filed 2002·Granted May 24, 2005·48 cites·14 claims
- 1993US5612642APower-on reset circuit with hysteresisALTERA CORP·Filed 1995·Granted Mar 18, 1997·77 cites·9 claims
- 2092US5847617AVariable-path-length voltage-controlled oscillator circuitALTERA CORP·Filed 1997·Granted Dec 8, 1998·91 cites·12 claims
- 2191US5999016AArchitectures for programmable logic devicesALTERA CORP·Filed 1997·Granted Dec 7, 1999·106 cites·18 claims
- 2291US5543732AProgrammable logic array devices with interconnect lines of various lengthsALTERA CORP·Filed 1995·Granted Aug 6, 1996·75 cites·26 claims
- 2391US5384499AHigh-density erasable programmable logic device architecture using multiplexer interconnectionsALTERA CORP·Filed 1993·Granted Jan 24, 1995·49 cites·32 claims
- 2490US6661253B1Passgate structures for use in low-voltage applicationsALTERA CORP·Filed 2001·Granted Dec 9, 2003·29 cites·20 claims
- 2590US6605962B2PLD architecture for flexible placement of IP function blocksALTERA CORP·Filed 2002·Granted Aug 12, 2003·27 cites·20 claims
- 2690US5883850AProgrammable logic array integrated circuitsALTERA CORP·Filed 1996·Granted Mar 16, 1999·68 cites·26 claims
- 2790US5764583AProgrammable logic array integrated circuitsALTERA CORP·Filed 1997·Granted Jun 9, 1998·40 cites·16 claims
- 2890US5144167AZero power, high impedance TTL-to-CMOS converterALTERA CORP·Filed 1991·Granted Sep 1, 1992·60 cites·4 claims
- 2989US5614840AProgrammable logic array integrated circuits with segmented, selectively connectable, long interconnection conductorsALTERA CORP·Filed 1995·Granted Mar 25, 1997·62 cites·10 claims
- 3088US6515508B1Differential interconnection circuits in programmable logic devicesALTERA CORP·Filed 2001·Granted Feb 4, 2003·31 cites·4 claims
- 3188US6278291B1Programmable logic array devices with interconnect lines of various lengthsALTERA CORP·Filed 2000·Granted Aug 21, 2001·28 cites·21 claims
- 3287US5592106AProgrammable logic array integrated circuits with interconnection conductors of overlapping extentALTERA CORP·Filed 1995·Granted Jan 7, 1997·60 cites·24 claims
- 3386US8201129B2PLD architecture for flexible placement of IP function blocksLEE ANDY L·Filed 2009·Granted Jun 12, 2012·8 cites·30 claims
- 3486US6481000B1Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuitsALTERA CORP·Filed 2000·Granted Nov 12, 2002·27 cites·55 claims
- 3583US5705939AProgrammable logic array integrated circuits with segmented, selectively connectable, long interconnection conductorsALTERA CORP·Filed 1996·Granted Jan 6, 1998·40 cites·3 claims
- 3682US6630842B1Routing architecture for a programmable logic deviceALTERA CORP·Filed 2002·Granted Oct 7, 2003·25 cites·75 claims
- 3781US6091258ARedundancy circuitry for logic circuitsALTERA CORP·Filed 1999·Granted Jul 18, 2000·32 cites·18 claims
- 3880US5268598AHigh-density erasable programmable logic device architecture using multiplexer interconnectionsALTERA CORP·Filed 1993·Granted Dec 7, 1993·33 cites·27 claims
- 3978US9094014B2PLD architecture for flexible placement of IP function blocksALTERA CORP·Filed 2014·Granted Jul 28, 2015·2 cites·20 claims
- 4078US8732646B2PLD architecture for flexible placement of IP function blocksALTERA CORP·Filed 2013·Granted May 20, 2014·2 cites·20 claims
- 4178US6034536ARedundancy circuitry for logic circuitsALTERA CORP·Filed 1997·Granted Mar 7, 2000·40 cites·95 claims
- 4276US8407649B2PLD architecture for flexible placement of IP function blocksLEE ANDY L·Filed 2012·Granted Mar 26, 2013·2 cites·20 claims
- 4376US6826741B1Flexible I/O routing resourcesALTERA CORP·Filed 2002·Granted Nov 30, 2004·18 cites·27 claims
- 4476US5963049AProgrammable logic array integrated circuit architecturesALTERA CORP·Filed 1997·Granted Oct 5, 1999·24 cites·14 claims
- 4574US5821787APower-on reset circuit with well-defined reassertion voltageALTERA CORP·Filed 1996·Granted Oct 13, 1998·28 cites·25 claims
- 4672US6970014B1Routing architecture for a programmable logic deviceALTERA CORP·Filed 2003·Granted Nov 29, 2005·15 cites·25 claims
- 4770US7584447B2PLD architecture for flexible placement of IP function blocksALTERA CORP·Filed 2005·Granted Sep 1, 2009·3 cites·15 claims
- 4869US7034570B2I/O cell configuration for multiple I/O standardsALTERA CORP·Filed 2004·Granted Apr 25, 2006·11 cites·18 claims
- 4969US6714050B2I/O cell configuration for multiple I/O standardsALTERA CORP·Filed 2001·Granted Mar 30, 2004·11 cites·40 claims
- 5069US5900743AProgrammable logic array devices with interconnect lines of various lengthsALTERA CORP·Filed 1997·Granted May 4, 1999·18 cites·26 claims
Showing the top 50 of 77 patent records by PatentIndex Score.
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