Inventor · disambiguated record
Sam Sivakumar
Also filed as: SIVAKUMAR SAM
14 granted patents·562 citations·filing 1997–2019
94Inventor score
Files withINTEL CORP14
Top patents by PatentIndex Score
14 records- 0196US6365529B1Method for patterning dual damascene interconnects using a sacrificial light absorbing materialINTEL CORP·Filed 2000·Granted Apr 2, 2002·121 cites·20 claims
- 0291US6329118B1Method for patterning dual damascene interconnects using a sacrificial light absorbing materialINTEL CORP·Filed 1999·Granted Dec 11, 2001·107 cites·8 claims
- 0386US7648803B2Diagonal corner-to-corner sub-resolution assist features for photolithographyINTEL CORP·Filed 2006·Granted Jan 19, 2010·10 cites·20 claims
- 0482US7179570B2Chromeless phase shift lithography (CPL) masks having features to pattern large area line/space geometriesINTEL CORP·Filed 2005·Granted Feb 20, 2007·5 cites·10 claims
- 0582US6406995B1Pattern-sensitive deposition for damascene processingINTEL CORP·Filed 1999·Granted Jun 18, 2002·72 cites·30 claims
- 0681US11569231B2Non-planar transistors with channel regions having varying widthsINTEL CORP·Filed 2019·Granted Jan 31, 2023·3 cites·21 claims
- 0779US6037255AMethod for making integrated circuit having polymer interlayer dielectricINTEL CORP·Filed 1999·Granted Mar 14, 2000·55 cites·15 claims
- 0876US7056645B2Use of chromeless phase shift features to pattern large area line/space geometriesINTEL CORP·Filed 2002·Granted Jun 6, 2006·12 cites·15 claims
- 0976US6350670B1Method for making a semiconductor device having a carbon doped oxide insulating layerINTEL CORP·Filed 1999·Granted Feb 26, 2002·49 cites·15 claims
- 1071US7374865B2Methods to pattern contacts using chromeless phase shift masksINTEL CORP·Filed 2002·Granted May 20, 2008·9 cites·10 claims
- 1171US6384481B1Single step electroplating process for interconnect via fill and metal line patterningINTEL CORP·Filed 1999·Granted May 7, 2002·33 cites·5 claims
- 1271US6020266ASingle step electroplating process for interconnect via fill and metal line patterningINTEL CORP·Filed 1997·Granted Feb 1, 2000·33 cites·18 claims
- 1369US6774037B2Method integrating polymeric interlayer dielectric in integrated circuitsINTEL CORP·Filed 2002·Granted Aug 10, 2004·18 cites·22 claims
- 1466US6649515B2Photoimageable material patterning techniques useful in fabricating conductive lines in circuit structuresINTEL CORP·Filed 1998·Granted Nov 18, 2003·35 cites·14 claims
Join the waitlist — get patent alerts
Get an alert when Sam Sivakumar files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →