Inventor · disambiguated record
Chieh-Yu Hsieh
Also filed as: HSIEH CHIEH-YU
6 granted patents·3 pending applications·20 citations·filing 2010–2024
76Inventor score
Top patents by PatentIndex Score
9 records- 0192US11095301B1Flash-successive approximation register (SAR) hybrid analog-to-digital converter (ADC)QUALCOMM INC·Filed 2020·Granted Aug 17, 2021·4 cites·20 claims
- 0289US9998138B1Time-multiplexed successive approximation register (SAR) analog-to-digital converter (ADC) circuits for multi-channel receiversQUALCOMM INC·Filed 2017·Granted Jun 12, 2018·10 cites·30 claims
- 0376US8264392B1Compact high-speed analog-to-digital converter for both I and Q analog to digital conversionZAREI HOSSEIN·Filed 2010·Granted Sep 11, 2012·6 cites·15 claims
- 0453US12445143B2Analog-to-digital converter having time-constant tuning with pulse-width-based reference current and resistance searchingQUALCOMM INC·Filed 2024·Granted Oct 14, 2025·0 cites·20 claims
- 0553US2024429887A1Operational transconductance amplifier with boosted transconductanceQUALCOMM INC·Filed 2023·Application pending·0 cites
- 0649US2025317152A1Continuous-time delta-sigma analog-to-digital converter with duty-cycle-controlled input pathQUALCOMM INC·Filed 2024·Application pending·0 cites
- 0747US2025246998A1Duty-cycle and stray capacitance insensitive switched-capacitor current sourceQUALCOMM INC·Filed 2024·Application pending·0 cites
- 0840US8994571B1Compact high-speed analog-to-digital converter for both I and Q analog to digital conversionZAREI HOSSEIN·Filed 2012·Granted Mar 31, 2015·0 cites·19 claims
- 0936US9628103B2Multi-mode discrete-time delta-sigma modulator power optimization using split-integrator schemeQUALCOMM INC·Filed 2015·Granted Apr 18, 2017·0 cites·29 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →