Inventor · disambiguated record
Yan Solihin
Also filed as: SOLIHIN YAN
57 granted patents·93 citations·filing 2009–2019
97Inventor score
Files withEMPIRE TECHNOLOGY DEV LLC36SOLIHIN YAN19UNIV CENTRAL FLORIDA RES FOUND INC1UNIV NORTH CAROLINA STATE1
Top patents by PatentIndex Score
57 records- 0185US9846627B2Systems and methods for modeling memory access behavior and memory traffic timing behaviorUNIV NORTH CAROLINA STATE·Filed 2016·Granted Dec 19, 2017·5 cites·26 claims
- 0284US9158689B2Aggregating cache eviction notifications to a directoryEMPIRE TECHNOLOGY DEV LLC·Filed 2013·Granted Oct 13, 2015·7 cites·33 claims
- 0383US9047137B2Balanced processing using heterogeneous coresSOLIHIN YAN·Filed 2012·Granted Jun 2, 2015·6 cites·20 claims
- 0478US9760486B2Accelerating cache state transfer on a directory-based multicore architectureEMPIRE TECHNOLOGY DEV LLC·Filed 2016·Granted Sep 12, 2017·2 cites·20 claims
- 0578US8244986B2Data storage and access in multi-core processor architecturesSOLIHIN YAN·Filed 2009·Granted Aug 14, 2012·7 cites·25 claims
- 0678US8195888B2Multiprocessor cache prefetch with off-chip bandwidth allocationSOLIHIN YAN·Filed 2009·Granted Jun 5, 2012·8 cites·15 claims
- 0775US9053057B2Cache coherence directory in multi-processor architecturesSOLIHIN YAN·Filed 2012·Granted Jun 9, 2015·3 cites·26 claims
- 0875US8874849B2Sectored cache with a tag structure capable of tracking sectors of data stored for a particular cache waySOLIHIN YAN·Filed 2010·Granted Oct 28, 2014·4 cites·20 claims
- 0974US9766681B2Operations related to a retransmission bufferEMPIRE TECHNOLOGY DEV LLC·Filed 2014·Granted Sep 19, 2017·3 cites·33 claims
- 1074US9710303B2Shared cache data movement in thread migrationEMPIRE TECHNOLOGY DEV LLC·Filed 2013·Granted Jul 18, 2017·3 cites·20 claims
- 1174US8615633B2Multi-core processor cache coherence for reduced off-chip trafficSOLIHIN YAN·Filed 2009·Granted Dec 24, 2013·6 cites·32 claims
- 1273US9612961B2Cache partitioning in a multicore processorEMPIRE TECHNOLOGY DEV LLC·Filed 2013·Granted Apr 4, 2017·2 cites·20 claims
- 1373US9304898B2Hardware-based array compressionSOLIHIN YAN·Filed 2011·Granted Apr 5, 2016·3 cites·18 claims
- 1473US9229865B2One-cacheable multi-core architectureEMPIRE TECHNOLOGY DEV LLC·Filed 2013·Granted Jan 5, 2016·3 cites·35 claims
- 1573US8924754B2Quality of service targets in multicore processorsSOLIHIN YAN·Filed 2012·Granted Dec 30, 2014·3 cites·24 claims
- 1672US9098406B2Managing addressable memory in heterogeneous multicore processorsSOLIHIN YAN·Filed 2012·Granted Aug 4, 2015·3 cites·16 claims
- 1771US9965385B2Memory allocation acceleratorEMPIRE TECHNOLOGY DEV LLC·Filed 2016·Granted May 8, 2018·1 cites·22 claims
- 1871US9632832B2Thread and data assignment in multi-core processors based on cache miss dataEMPIRE TECHNOLOGY DEV LLC·Filed 2014·Granted Apr 25, 2017·2 cites·23 claims
- 1971US9465729B2Memory allocation acceleratorEMPIRE TECHNOLOGY DEV LLC·Filed 2013·Granted Oct 11, 2016·2 cites·22 claims
- 2071US9304946B2Hardware-base accelerator for managing copy-on-write of multi-level caches utilizing block copy-on-write differential update tableSOLIHIN YAN·Filed 2012·Granted Apr 5, 2016·3 cites·16 claims
- 2170US10176107B2Methods and systems for dynamic DRAM cache sizingEMPIRE TECHNOLOGY DEV LLC·Filed 2014·Granted Jan 8, 2019·2 cites·19 claims
- 2270US8990828B2Resource allocation in multi-core architecturesSOLIHIN YAN·Filed 2012·Granted Mar 24, 2015·2 cites·24 claims
- 2367US9772950B2Multi-granular cache coherenceEMPIRE TECHNOLOGY DEV LLC·Filed 2012·Granted Sep 26, 2017·2 cites·24 claims
- 2467US9047194B2Virtual cache directory in multi-processor architecturesSOLIHIN YAN·Filed 2012·Granted Jun 2, 2015·2 cites·20 claims
- 2565US10956331B2Cache partitioning in a multicore processorEMPIRE TECHNOLOGY DEV LLC·Filed 2019·Granted Mar 23, 2021·0 cites·18 claims
- 2664US9990293B2Energy-efficient dynamic dram cache sizing via selective refresh of a cache in a dramEMPIRE TECHNOLOGY DEV LLC·Filed 2014·Granted Jun 5, 2018·1 cites·24 claims
- 2764US8589933B2Low power execution of a multithreaded programSOLIHIN YAN·Filed 2010·Granted Nov 19, 2013·1 cites·36 claims
- 2863US10152410B2Magnetoresistive random-access memory cache write managementEMPIRE TECHNOLOGY DEV LLC·Filed 2014·Granted Dec 11, 2018·1 cites·22 claims
- 2963US9336146B2Accelerating cache state transfer on a directory-based multicore architectureSOLIHIN YAN·Filed 2010·Granted May 10, 2016·1 cites·21 claims
- 3062US10445287B2Circuit switch pre-reservation in an on-chip networkEMPIRE TECHNOLOGY DEV LLC·Filed 2013·Granted Oct 15, 2019·1 cites·29 claims
- 3161US11281545B2Methods of crash recovery for data stored in non-volatile main memoryUNIV CENTRAL FLORIDA RES FOUND INC·Filed 2019·Granted Mar 22, 2022·1 cites·20 claims
- 3260US9275696B2Energy conservation in a multicore chipSOLIHIN YAN·Filed 2012·Granted Mar 1, 2016·2 cites·23 claims
- 3359US10346308B2Cache partitioning in a multicore processorEMPIRE TECHNOLOGY DEV LLC·Filed 2017·Granted Jul 9, 2019·0 cites·20 claims
- 3459US8667227B2Domain based cache coherence protocolSOLIHIN YAN·Filed 2009·Granted Mar 4, 2014·1 cites·26 claims
- 3556US9342305B2Low power execution of a multithreaded programEMPIRE TECHNOLOGY DEV LLC·Filed 2013·Granted May 17, 2016·0 cites·22 claims
- 3655US10289452B2Thread and data assignment in multi-core processors based on cache miss data and thread categoryEMPIRE TECHNOLOGY DEV LLC·Filed 2017·Granted May 14, 2019·0 cites·18 claims
- 3752US9471381B2Resource allocation in multi-core architecturesEMPIRE TECHNOLOGY DEV LLC·Filed 2015·Granted Oct 18, 2016·0 cites·20 claims
- 3852US9251072B2Cache coherence directory in multi-processor architecturesEMPIRE TECHNOLOGY DEV LLC·Filed 2015·Granted Feb 2, 2016·0 cites·23 claims
- 3952US8407426B2Data storage and access in multi-core processor architecturesSOLIHIN YAN·Filed 2012·Granted Mar 26, 2013·0 cites·38 claims
- 4051US9207980B2Balanced processing using heterogeneous coresEMPIRE TECHNOLOGY DEV LLC·Filed 2015·Granted Dec 8, 2015·0 cites·20 claims
- 4150US10007605B2Hardware-based array compressionEMPIRE TECHNOLOGY DEV LLC·Filed 2015·Granted Jun 26, 2018·0 cites·17 claims
- 4250US9946647B2Directory coherence for multicore processorsEMPIRE TECHNOLOGY DEV LLC·Filed 2014·Granted Apr 17, 2018·0 cites·19 claims
- 4350US9916255B2Data storage based on memory persistencyEMPIRE TECHNOLOGY DEV LLC·Filed 2014·Granted Mar 13, 2018·0 cites·21 claims
- 4449US8868800B2Accelerator buffer accessEMPIRE TECHNOLOGY DEV LLC·Filed 2013·Granted Oct 21, 2014·0 cites·31 claims
- 4548US10445131B2Core prioritization for heterogeneous on-chip networksEMPIRE TECHNOLOGY DEV LLC·Filed 2014·Granted Oct 15, 2019·0 cites·15 claims
- 4648US9858111B2Heterogeneous magnetic memory architectureEMPIRE TECHNOLOGY DEV LLC·Filed 2014·Granted Jan 2, 2018·0 cites·18 claims
- 4747US9473426B2Hybrid routers in multicore architecturesEMPIRE TECHNOLOGY DEV LLC·Filed 2013·Granted Oct 18, 2016·0 cites·20 claims
- 4846US9564202B2Increased refresh interval and energy efficiency in a DRAMEMPIRE TECHNOLOGY DEV LLC·Filed 2013·Granted Feb 7, 2017·0 cites·22 claims
- 4946US9411693B2Directory error correction in multi-core processor architecturesSOLIHIN YAN·Filed 2012·Granted Aug 9, 2016·0 cites·31 claims
- 5045US10346227B2Increased refresh interval and energy efficiency in a DRAMEMPIRE TECHNOLOGY DEV LLC·Filed 2017·Granted Jul 9, 2019·0 cites·15 claims
Showing the top 50 of 57 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →