Inventor · disambiguated record
Jaideep Mukherjee
Also filed as: MUKHERJEE JAIDEEP
4 granted patents·15 citations·filing 2014–2017
69Inventor score
Technology areasG06F
Files withCADENCE DESIGN SYSTEMS INC4
Top patents by PatentIndex Score
4 records- 0187US10248747B1Integrated circuit simulation with data persistency for efficient memory usageCADENCE DESIGN SYSTEMS INC·Filed 2017·Granted Apr 2, 2019·8 cites·20 claims
- 0280US10248745B1Integrated circuit simulation with variability analysis for efficient memory usageCADENCE DESIGN SYSTEMS INC·Filed 2017·Granted Apr 2, 2019·4 cites·17 claims
- 0367US9038008B1System and method for containing analog verification IPCADENCE DESIGN SYSTEMS INC·Filed 2014·Granted May 19, 2015·2 cites·20 claims
- 0465US10303828B1Integrated circuit simulation with efficient memory usageCADENCE DESIGN SYSTEMS INC·Filed 2017·Granted May 28, 2019·1 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →