Inventor · disambiguated record
Navneet Gupta
Also filed as: GUPTA NAVNEET
19 granted patents·6 pending applications·34 citations·filing 2010–2023
89Inventor score
Top patents by PatentIndex Score
25 records- 0191US7944241B1Circuit for glitchless switching between asynchronous clocksST MICROELECTRONICS PVT LTD·Filed 2010·Granted May 17, 2011·19 cites·30 claims
- 0280US10079056B2SRAM memory bit cell comprising n-TFET and p-TFETCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Sep 18, 2018·5 cites·13 claims
- 0374US11558039B2Method and arrangement for ensuring valid data at a second stage of a digital register circuitMINIMA PROCESSOR OY·Filed 2017·Granted Jan 17, 2023·2 cites·20 claims
- 0470US9679649B2Reconfigurable camCOMMISSARIAT L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES·Filed 2016·Granted Jun 13, 2017·3 cites·11 claims
- 0566US8456197B2Differential data sensingDUBEY PRASHANT·Filed 2011·Granted Jun 4, 2013·5 cites·19 claims
- 0656US12032428B2Asynchronous FIFO for power-domain crossingWESTERN DIGITAL TECH INC·Filed 2021·Granted Jul 9, 2024·0 cites·20 claims
- 0754US12137515B2Electromagnetic interference shielding and thermal management systems and methods for automotive radar applicationsAPTIV TECH LTD·Filed 2021·Granted Nov 5, 2024·0 cites·20 claims
- 0854US2024057246A1Through board via heat sinkAPTIV TECH LTD·Filed 2023·Application pending·0 cites
- 0953US11825593B2Through board via heat sinkAPTIV TECH LTD·Filed 2022·Granted Nov 21, 2023·0 cites·16 claims
- 1048US12182612B2Method, arrangement, and computer program product for organizing the excitation of processing paths for testing a microelectric circuitMINIMA PROCESSOR OY·Filed 2019·Granted Dec 31, 2024·0 cites·20 claims
- 1148US11699012B2Coverage based microelectronic circuit, and method for providing a design of a microelectronic circuitMINIMA PROCESSOR OY·Filed 2018·Granted Jul 11, 2023·0 cites·14 claims
- 1248US2023408636A1Metalized plastic housing enclosure heat sinkAPTIV TECH LTD·Filed 2022·Application pending·0 cites
- 1342US11953970B2System with microelectronic circuit, and a method for controlling the operation of a microelectronic circuitMINIMA PROCESSOR OY·Filed 2019·Granted Apr 9, 2024·0 cites·25 claims
- 1442US2018012222A1Pre-authentication of mobile paymentsIBM·Filed 2016·Application pending·0 cites
- 1541US12113530B2Microelectronic circuit capable of selectively activating processing paths, and a method for activating processing paths in a microelectronic circuitMINIMA PROCESSOR OY·Filed 2018·Granted Oct 8, 2024·0 cites·13 claims
- 1640US12085611B2Applications of adaptive microelectronic circuits that are designed for testabilityMINIMA PROCESSOR OY·Filed 2018·Granted Sep 10, 2024·0 cites·19 claims
- 1739US2019080761A1Cam memory cellCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Application pending·0 cites
- 1837US11894848B2Register circuit with detection of data events, and method for detecting data events in a register circuitMINIMA PROCESSOR OY·Filed 2018·Granted Feb 6, 2024·0 cites·8 claims
- 1936US11929746B2Method and arrangement for protecting a digital circuit against time errorsMINIMA PROCESSOR OY·Filed 2017·Granted Mar 12, 2024·0 cites·8 claims
- 2035US2025251450A1Adjustable timing event monitoring windowMINIMA PROCESSOR OY·Filed 2022·Application pending·0 cites
- 2133US10110203B2Tri-state inverter, D latch and master-slave flip-flop comprising TFETsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Oct 23, 2018·0 cites·10 claims
- 2233US8624623B2Apparatus having error detection in sequential logicGUPTA NAVNEET·Filed 2011·Granted Jan 7, 2014·0 cites·25 claims
- 2332US9860066B2Location control of cloud data storesIBM·Filed 2015·Granted Jan 2, 2018·0 cites·18 claims
- 2432US2018268890A1Refresh-free tfet memory latchCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2018·Application pending·0 cites
- 2529US8737144B2Memory architecture and design methodology with adaptive readGUPTA NAVNEET·Filed 2011·Granted May 27, 2014·0 cites·53 claims
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