Inventor · disambiguated record
Mark S. Hlad
Also filed as: HLAD MARK · HLAD MARK S
20 granted patents·47 citations·filing 2006–2018
92Inventor score
Top patents by PatentIndex Score
20 records- 0188US8508037B2Bumpless build-up layer and laminated core hybrid structures and methods of assembling sameMANUSHAROW MATHEW J·Filed 2010·Granted Aug 13, 2013·9 cites·15 claims
- 0285US7888784B2Substrate package with through holes for high speed I/O flex cableINTEL CORP·Filed 2008·Granted Feb 15, 2011·11 cites·15 claims
- 0381US9583390B2Organic thin film passivation of metal interconnectionsINTEL CORP·Filed 2016·Granted Feb 28, 2017·3 cites·12 claims
- 0481US9257276B2Organic thin film passivation of metal interconnectionsALEKSOV ALEKSANDAR·Filed 2011·Granted Feb 9, 2016·5 cites·27 claims
- 0580US9198293B2Non-cylindrical conducting shapes in multilayer laminated substrate coresCHASE HAROLD R·Filed 2013·Granted Nov 24, 2015·8 cites·20 claims
- 0674US8353101B2Method of making substrate package with through holes for high speed I/O flex cableINTEL CORP·Filed 2011·Granted Jan 15, 2013·3 cites·5 claims
- 0770US9406587B2Substrate conductor structure and methodCHASE HAROLD RYAN·Filed 2012·Granted Aug 2, 2016·2 cites·14 claims
- 0868US9824991B2Organic thin film passivation of metal interconnectionsINTEL CORP·Filed 2017·Granted Nov 21, 2017·1 cites·20 claims
- 0967US7776734B2Barrier layer for fine-pitch mask-based substrate bumpingINTEL CORP·Filed 2006·Granted Aug 17, 2010·3 cites·12 claims
- 1060US10734282B2Substrate conductor structure and methodINTEL CORP·Filed 2018·Granted Aug 4, 2020·0 cites·11 claims
- 1160US9299602B2Enabling package-on-package (PoP) pad surface finishes on bumpless build-up layer (BBUL) packageZHANG QINGLEI·Filed 2011·Granted Mar 29, 2016·2 cites·25 claims
- 1257US9093313B2Device packaging with substrates having embedded lines and metal defined padsINTEL CORP·Filed 2014·Granted Jul 28, 2015·0 cites·3 claims
- 1355US10121701B2Substrate conductor structure and methodINTEL CORP·Filed 2016·Granted Nov 6, 2018·0 cites·10 claims
- 1454US8809124B2Bumpless build-up layer and laminated core hybrid structures and methods of assembling sameINTEL CORP·Filed 2013·Granted Aug 19, 2014·0 cites·20 claims
- 1553US9355952B2Device packaging with substrates having embedded lines and metal defined padsINTEL CORP·Filed 2015·Granted May 31, 2016·0 cites·14 claims
- 1648US8183692B2Barrier layer for fine-pitch mask-based substrate bumpingNALLA RAVI K·Filed 2010·Granted May 22, 2012·0 cites·7 claims
- 1746US7919408B2Methods for fabricating fine line/space (FLS) routing in high density interconnect (HDI) substratesINTEL CORP·Filed 2008·Granted Apr 5, 2011·0 cites·21 claims
- 1845US10856424B2Electronic assembly that includes void free holesINTEL CORP·Filed 2015·Granted Dec 1, 2020·0 cites·8 claims
- 1943US8835217B2Device packaging with substrates having embedded lines and metal defined padsHLAD MARK S·Filed 2010·Granted Sep 16, 2014·0 cites·5 claims
- 2039US8877632B1Providing a void-free filled interconnect structure in a layer of package substrateSCHUCKMAN AMANDA E·Filed 2013·Granted Nov 4, 2014·0 cites·21 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →