Inventor · disambiguated record
Hieu T. Huynh
Also filed as: HUYNH HIEU · HUYNH HIEU T · HUYNH HIEU TRONG
19 granted patents·1 pending application·15 citations·filing 2007–2021
89Inventor score
Top patents by PatentIndex Score
20 records- 0177US10915461B2Multilevel cache eviction managementIBM·Filed 2019·Granted Feb 9, 2021·2 cites·14 claims
- 0275US9003127B2Storing data in a system memory for a subsequent cache flushIBM·Filed 2013·Granted Apr 7, 2015·3 cites·9 claims
- 0374US8458405B2Cache bank modeling with variable access and busy timesBRONSON TIMOTHY C·Filed 2010·Granted Jun 4, 2013·4 cites·20 claims
- 0469US8930616B2System refresh in cache memoryIBM·Filed 2012·Granted Jan 6, 2015·2 cites·20 claims
- 0565US9495107B2Dynamic relocation of storageIBM·Filed 2014·Granted Nov 15, 2016·1 cites·20 claims
- 0665US8874957B2Dynamic cache correction mechanism to allow constant access to addressable indexIBM·Filed 2013·Granted Oct 28, 2014·1 cites·8 claims
- 0764US8381019B2EDRAM macro disablement in cache memoryIBM·Filed 2010·Granted Feb 19, 2013·1 cites·16 claims
- 0855US11620231B2Lateral persistence directory statesIBM·Filed 2021·Granted Apr 4, 2023·0 cites·25 claims
- 0954US8560891B2EDRAM macro disablement in cache memoryIBM·Filed 2012·Granted Oct 15, 2013·0 cites·6 claims
- 1052US9086990B2Bitline deletionIBM·Filed 2013·Granted Jul 21, 2015·0 cites·14 claims
- 1152US8719618B2Dynamic cache correction mechanism to allow constant access to addressable indexAMBROLADZE EKATERINA M·Filed 2012·Granted May 6, 2014·0 cites·12 claims
- 1251US8788891B2Bitline deletionAMBROLADZE EKATERINA M·Filed 2012·Granted Jul 22, 2014·0 cites·8 claims
- 1350US8990507B2Storing data in a system memory for a subsequent cache flushBLAKE MICHAEL A·Filed 2012·Granted Mar 24, 2015·0 cites·5 claims
- 1449US10901902B2Efficient inclusive cache managementIBM·Filed 2019·Granted Jan 26, 2021·0 cites·13 claims
- 1546US11048427B2Evacuation of memory from a drawer in a live multi-node systemIBM·Filed 2019·Granted Jun 29, 2021·0 cites·20 claims
- 1646US9489255B2Dynamic array maskingIBM·Filed 2015·Granted Nov 8, 2016·0 cites·18 claims
- 1746US7702972B2Method and apparatus for SRAM macro sparing in computer chipsIBM·Filed 2007·Granted Apr 20, 2010·1 cites·19 claims
- 1843US2011320699A1System Refresh in Cache MemoryBLAKE MICHAEL·Filed 2010·Application pending·0 cites
- 1941US8291157B2Concurrent refresh in cache memoryBRONSON TIMOTHY C·Filed 2010·Granted Oct 16, 2012·0 cites·22 claims
- 2036US11221794B2Memory array element sparingIBM·Filed 2019·Granted Jan 11, 2022·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →