Inventor · disambiguated record
Ganapati Srinivasa
Also filed as: SRINIVASA GANAPATI · SRINIVASA GANAPATI N
39 granted patents·6 pending applications·242 citations·filing 2000–2023
97Inventor score
Top patents by PatentIndex Score
45 records- 0191US8117478B2Optimizing power usage by processor cores based on architectural eventsLIU YEN-CHENG·Filed 2006·Granted Feb 14, 2012·34 cites·27 claims
- 0290US8275942B2Performance prioritization in multi-threaded processorsYIGZAW THEODROS·Filed 2005·Granted Sep 25, 2012·31 cites·32 claims
- 0389US8751714B2Implementing quickpath interconnect protocol over a PCIe interfaceSAFRANEK ROBERT J·Filed 2010·Granted Jun 10, 2014·15 cites·22 claims
- 0487US9639490B2Ring protocol for low latency interconnect switchBLANKENSHIP ROBERT G·Filed 2011·Granted May 2, 2017·13 cites·19 claims
- 0587US9575895B2Providing common caching agent for core and integrated input/output (IO) moduleINTEL CORP·Filed 2015·Granted Feb 21, 2017·5 cites·17 claims
- 0686US8473766B2Optimizing power usage by processor cores based on architectural eventsLIU YEN-CHENG·Filed 2012·Granted Jun 25, 2013·6 cites·1 claims
- 0782US7277992B2Cache eviction technique for reducing cache eviction trafficINTEL CORP·Filed 2005·Granted Oct 2, 2007·13 cites·30 claims
- 0881US10185566B2Migrating tasks between asymmetric computing elements of a multi-core processorNAVEH ALON·Filed 2012·Granted Jan 22, 2019·5 cites·19 claims
- 0981US10162687B2Selective migration of workloads between heterogeneous compute elements based on evaluation of migration performance benefit and available energy and thermal budgetsINTEL CORP·Filed 2012·Granted Dec 25, 2018·5 cites·25 claims
- 1081US9329900B2Hetergeneous processor apparatus and methodINTEL CORP·Filed 2012·Granted May 3, 2016·6 cites·25 claims
- 1181US8169850B2Forming multiprocessor systems using dual processorsSISTLA KRISHNAKANTH·Filed 2009·Granted May 1, 2012·10 cites·14 claims
- 1280US8984228B2Providing common caching agent for core and integrated input/output (IO) moduleLIU YEN-CHENG·Filed 2011·Granted Mar 17, 2015·5 cites·19 claims
- 1379US9501129B2Dynamically adjusting power of non-core processor circuitry including buffer circuitryINTEL CORP·Filed 2013·Granted Nov 22, 2016·4 cites·18 claims
- 1478US9672046B2Apparatus and method for intelligently powering heterogeneous processor componentsINTEL CORP·Filed 2012·Granted Jun 6, 2017·5 cites·32 claims
- 1577US12189479B2Apparatus and method for detecting and recovering from data fetch errorsINTEL CORP·Filed 2022·Granted Jan 7, 2025·0 cites·25 claims
- 1677US7647476B2Common analog interface for multiple processor coresINTEL CORP·Filed 2006·Granted Jan 12, 2010·9 cites·16 claims
- 1776US8700933B2Optimizing power usage by factoring processor architectural events to PMUINTEL CORP·Filed 2013·Granted Apr 15, 2014·2 cites·18 claims
- 1875US9448879B2Apparatus and method for implement a multi-level memory hierarchyYIGZAW THEODROS·Filed 2011·Granted Sep 20, 2016·4 cites·24 claims
- 1975US8412970B2Optimizing power usage by factoring processor architectural events to PMULIU YEN-CHENG·Filed 2011·Granted Apr 2, 2013·2 cites·19 claims
- 2074US9727345B2Method for booting a heterogeneous system and presenting a symmetric core viewINTEL CORP·Filed 2013·Granted Aug 8, 2017·3 cites·17 claims
- 2173US12094105B2System and method for automatic labeling of pathology imagesDATMA INC·Filed 2020·Granted Sep 17, 2024·2 cites·18 claims
- 2273US7168074B1Runtime prediction framework for CPU intensive applicationsINTEL CORP·Filed 2000·Granted Jan 23, 2007·13 cites·18 claims
- 2373US6897857B2Generating rendering cost estimatesINTEL CORP·Filed 2003·Granted May 24, 2005·8 cites·39 claims
- 2472US6618046B1System and method for estimating the rendering cost for imagesINTEL CORP·Filed 2000·Granted Sep 9, 2003·19 cites·24 claims
- 2569US9639372B2Apparatus and method for heterogeneous processors mapping to virtual coresINTEL CORP·Filed 2012·Granted May 2, 2017·2 cites·22 claims
- 2669US9448829B2Hetergeneous processor apparatus and methodINTEL CORP·Filed 2012·Granted Sep 20, 2016·2 cites·20 claims
- 2769US2021318932A1Apparatus and method for detecting and recovering from data fetch errorsINTEL CORP·Filed 2021·Application pending·0 cites
- 2868US8079031B2Method, apparatus, and a system for dynamically configuring a prefetcher based on a thread specific latency metricSANTHANAKRISHNAN GEEYARPURAM N·Filed 2005·Granted Dec 13, 2011·7 cites·18 claims
- 2964US11048587B2Apparatus and method for detecting and recovering from data fetch errorsINTEL CORP·Filed 2019·Granted Jun 29, 2021·0 cites·25 claims
- 3061US11138201B2System and method for integrating data for precision medicineOMICS DATA AUTOMATION INC·Filed 2018·Granted Oct 5, 2021·1 cites·20 claims
- 3161US7711901B2Method, system, and apparatus for an hierarchical cache line replacementINTEL CORP·Filed 2004·Granted May 4, 2010·9 cites·20 claims
- 3260US12494279B2System and method for data visualizationDATMA INC·Filed 2021·Granted Dec 9, 2025·0 cites·19 claims
- 3360US8966299B2Optimizing power usage by factoring processor architectural events to PMUINTEL CORP·Filed 2014·Granted Feb 24, 2015·0 cites·20 claims
- 3460US7353338B2Credit mechanism for multiple banks of shared cacheINTEL CORP·Filed 2005·Granted Apr 1, 2008·2 cites·30 claims
- 3556US10503517B2Method for booting a heterogeneous system and presenting a symmetric core viewINTEL CORP·Filed 2017·Granted Dec 10, 2019·0 cites·15 claims
- 3653US10223204B2Apparatus and method for detecting and recovering from data fetch errorsYIGZAW THEODROS·Filed 2011·Granted Mar 5, 2019·0 cites·18 claims
- 3751US11727010B2System and method for integrating data for precision medicineOMICS DATA AUTOMATION INC·Filed 2021·Granted Aug 15, 2023·0 cites·15 claims
- 3850US8705311B2Forming multiprocessor systems using dual processorsSISTLA KRISHNAKANTH·Filed 2012·Granted Apr 22, 2014·0 cites·18 claims
- 3949US9910807B2Ring protocol for low latency interconnect switchINTEL CORP·Filed 2017·Granted Mar 6, 2018·0 cites·21 claims
- 4047US8914650B2Dynamically adjusting power of non-core processor circuitry including buffer circuitrySISTLA KRISHNAKANTH·Filed 2011·Granted Dec 16, 2014·0 cites·18 claims
- 4144US2014189302A1Optimal logical processor count and type selection for a given workload based on platform thermals and power budgeting constraintsINTEL CORP·Filed 2012·Application pending·0 cites
- 4242US2014181830A1Thread migration support for architectually different coresNAIK MISHALI·Filed 2012·Application pending·0 cites
- 4341US2023315738A1System and method for integrating data for precision medicineOMICS DATA AUTOMATION INC·Filed 2023·Application pending·0 cites
- 4440US2007186045A1Cache eviction technique for inclusive cache systemsSHANNON CHRISTOPHER J·Filed 2004·Application pending·0 cites
- 4539US2015006776A1On-chip mesh interconnectLIU YEN-CHENG·Filed 2013·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →