Inventor · disambiguated record
David Greenhill
Also filed as: GREENHILL DAVID · GREENHILL DAVID J
21 granted patents·1 pending application·349 citations·filing 1996–2018
95Inventor score
Files withSUN MICROSYSTEMS INC11LE HANH-PHUC2ORACLE AMERICA INC2SATCOM DIRECT INC2GREENHILL DAVID J1
Top patents by PatentIndex Score
22 records- 0195US6426652B1Dual-edge triggered dynamic logicSUN MICROSYSTEMS INC·Filed 2001·Granted Jul 30, 2002·68 cites·27 claims
- 0291US7418582B1Versatile register file design for a multi-threaded processor utilizing different modes and register windowsSUN MICROSYSTEMS INC·Filed 2004·Granted Aug 26, 2008·70 cites·24 claims
- 0389US8648645B2Microprocessor performance and power optimization through self calibrated inductive voltage droop monitoring and correctionKONSTADINIDIS GEORGIOS·Filed 2010·Granted Feb 11, 2014·15 cites·15 claims
- 0488US6570407B1Scannable latch for a dynamic circuitSUN MICROSYSTEMS INC·Filed 2002·Granted May 27, 2003·60 cites·20 claims
- 0586US8269544B2Power-supply noise suppression using a frequency-locked loopGREENHILL DAVID J·Filed 2010·Granted Sep 18, 2012·12 cites·20 claims
- 0683US5668490AFlip-flop with full scan capabilitySUN MICROSYSTEMS INC·Filed 1996·Granted Sep 16, 1997·47 cites·34 claims
- 0782US10049508B2Automated flight operations systemSATCOM DIRECT INC·Filed 2016·Granted Aug 14, 2018·6 cites·21 claims
- 0879US11475719B1Automated flight operations systemSATCOM DIRECT INC·Filed 2018·Granted Oct 18, 2022·2 cites·19 claims
- 0978US8208467B2Method and apparatus for modulating the width of a high-speed linkKAPIL SANJIV·Filed 2009·Granted Jun 26, 2012·9 cites·17 claims
- 1076US7000164B2Method for scan testing and clocking dynamic domino circuits in VLSI systems using level sensitive latches and edge triggered flip flopsSUN MICROSYSTEMS INC·Filed 2002·Granted Feb 14, 2006·20 cites·34 claims
- 1169US7532003B1Method and apparatus for setting VDD on a per chip basisSUN MICROSYSTEMS INC·Filed 2006·Granted May 12, 2009·7 cites·20 claims
- 1266US8283960B2Minimal bubble voltage regulatorLE HANH-PHUC·Filed 2009·Granted Oct 9, 2012·6 cites·15 claims
- 1363US8198931B2Fine grain timingLE HANH-PHUC·Filed 2009·Granted Jun 12, 2012·4 cites·19 claims
- 1456US7421382B2Data analysis techniques for dynamic power simulation of a CPUSUN MICROSYSTEMS INC·Filed 2001·Granted Sep 2, 2008·5 cites·14 claims
- 1554US7872516B2Precision pulse generatorORACLE AMERICA INC·Filed 2008·Granted Jan 18, 2011·2 cites·16 claims
- 1651US6895561B2Power modeling methodology for a pipelined processorSUN MICROSYSTEMS INC·Filed 2001·Granted May 17, 2005·5 cites·8 claims
- 1750US11334263B2Configuration or data caching for programmable logic deviceINTEL CORP·Filed 2018·Granted May 17, 2022·0 cites·19 claims
- 1848US7098501B2Thin capacitive structureSUN MICROSYSTEMS INC·Filed 2003·Granted Aug 29, 2006·3 cites·10 claims
- 1945US7816966B1Economy precision pulse generatorORACLE AMERICA INC·Filed 2009·Granted Oct 19, 2010·1 cites·21 claims
- 2041US6993103B2Method for synchronizing clock and data signalsSUN MICROSYSTEMS INC·Filed 2001·Granted Jan 31, 2006·0 cites·16 claims
- 2141USH1796HMethod and circuit for eliminating hold time violations in synchronous circuitsSUN MICROSYSTEMS INC·Filed 1996·Granted Jul 6, 1999·7 cites·31 claims
- 2239US2012218034A1Voltage calibration method and apparatusTURULLOLS SEBASTIAN·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →